v64
u64 v64;
return d.v64;
u64 v64;
return d.v64;
v64 src_addr;
v64 dst_addr;
v64 next_ln_addr;
u64 v64;
v64 = (u64)best_bitrate_error * 10000;
do_div(v64, bt->bitrate);
bitrate_error = (u32)v64;
v64 = (u64)best_brp * 1000 * 1000 * 1000;
do_div(v64, priv->clock.freq);
bt->tq = (u32)v64;
u64 v64;
v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
*addr &= ~v64;
*addr |= ((u64)dest_island << iid_lsb) & v64;
u64 v64;
v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
*addr &= ~v64;
*addr |= (((u64)dest_island) << iid_lsb) & v64;
v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
*addr &= ~v64;
*addr |= (((u64)dest_island) << iid_lsb) & v64;
v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
*addr &= ~v64;
*addr |= (((u64)dest_island) << iid_lsb) & v64;
v64 = GENMASK_ULL(iid_lsb + 5, iid_lsb);
*addr &= ~v64;
*addr |= (((u64)dest_island) << iid_lsb) & v64;
union { u64 v64; u32 v32; u16 v16; } u;
u.v64 = read64(mmio + AMD_BAR1XLAT_OFFSET);
"XLAT1 -\t\t%#018llx\n", u.v64);
u.v64 = read64(ndev->self_mmio + AMD_BAR23XLAT_OFFSET);
"XLAT23 -\t\t%#018llx\n", u.v64);
u.v64 = read64(ndev->self_mmio + AMD_BAR45XLAT_OFFSET);
"XLAT45 -\t\t%#018llx\n", u.v64);
u.v64 = read64(ndev->self_mmio + AMD_BAR23LMT_OFFSET);
"LMT23 -\t\t\t%#018llx\n", u.v64);
u.v64 = read64(ndev->self_mmio + AMD_BAR45LMT_OFFSET);
"LMT45 -\t\t\t%#018llx\n", u.v64);
union { u64 v64; u32 v32; u16 v16; u8 v8; } u;
u.v64 = ndev_db_read(ndev, mmio + ndev->self_reg->db_mask);
"Doorbell Mask -\t\t%#llx\n", u.v64);
u.v64 = ndev_db_read(ndev, mmio + ndev->self_reg->db_bell);
"Doorbell Bell -\t\t%#llx\n", u.v64);
u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 2));
"XLAT23 -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_xlat, 4));
"XLAT45 -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 2));
"LMT23 -\t\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + bar2_off(ndev->xlat_reg->bar2_limit, 4));
"LMT45 -\t\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + XEON_PBAR23XLAT_OFFSET);
"B2B XLAT23 -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + XEON_PBAR45XLAT_OFFSET);
u.v64);
u.v64 = ioread64(mmio + XEON_PBAR23LMT_OFFSET);
"B2B LMT23 -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + XEON_PBAR45LMT_OFFSET);
u.v64);
u.v64 = ioread64(mmio + XEON_SBAR0BASE_OFFSET);
"SBAR01 -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + XEON_SBAR23BASE_OFFSET);
"SBAR23 -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + XEON_SBAR45BASE_OFFSET);
u.v64);
union { u64 v64; u32 v32; u16 v16; } u;
u.v64 = ndev_db_read(ndev, mmio + ndev->self_reg->db_mask);
"Doorbell Mask -\t\t%#llx\n", u.v64);
u.v64 = ndev_db_read(ndev, mmio + ndev->self_reg->db_bell);
"Doorbell Bell -\t\t%#llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_IMBAR1XBASE_OFFSET);
"IMBAR1XBASE -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_IMBAR2XBASE_OFFSET);
"IMBAR2XBASE -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_IMBAR1XLMT_OFFSET);
"IMBAR1XLMT -\t\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_IMBAR2XLMT_OFFSET);
"IMBAR2XLMT -\t\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_EMBAR1XBASE_OFFSET);
"EMBAR1XBASE -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_EMBAR2XBASE_OFFSET);
"EMBAR2XBASE -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_EMBAR1XLMT_OFFSET);
"EMBAR1XLMT -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_EMBAR2XLMT_OFFSET);
"EMBAR2XLMT -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_EMBAR0_OFFSET);
"EMBAR0 -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_EMBAR1_OFFSET);
"EMBAR1 -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN3_EMBAR2_OFFSET);
"EMBAR2 -\t\t%#018llx\n", u.v64);
union { u64 v64; u32 v32; u16 v16; } u;
u.v64 = ndev_db_read(ndev, mmio + ndev->self_reg->db_mask);
"Doorbell Mask -\t\t%#llx\n", u.v64);
u.v64 = ioread64(mmio + GEN4_IM23XBASE_OFFSET);
"IM23XBASE -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN4_IM45XBASE_OFFSET);
"IM45XBASE -\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN4_IM23XLMT_OFFSET);
"IM23XLMT -\t\t\t%#018llx\n", u.v64);
u.v64 = ioread64(mmio + GEN4_IM45XLMT_OFFSET);
"IM45XLMT -\t\t\t%#018llx\n", u.v64);
if (after(ack, ca->rtt_seq) && ca->rtt.v64) {
if (ca->rtt_prev.v64)
ca->rtt.v64 = 0;
ca->rtt.v64 = 0;
u64 v64;
__be64 v64;
__be64 v64;
if (!p->locator_match.v64)
if (p->locator_match.v64)
p->locator.v64 = (__force __be64)nla_get_u64(tb[ILA_ATTR_LOCATOR]);
if (nla_put_u64_64bit(skb, ILA_ATTR_LOCATOR, (__force u64)p->locator.v64,
return (a_p->locator.v64 != b_p->locator.v64);
xp->ip.locator.v64 = (__force __be64)nla_get_u64(
xp->ip.locator_match.v64 = (__force __be64)nla_get_u64(
(__force u64)ila->xp.ip.locator.v64,
(__force u64)ila->xp.ip.locator_match.v64,
return (ila->xp.ip.locator_match.v64 != *(__be64 *)arg->key);
const struct btf_enum64 *v64;
v64 = btf_enum64(t) + 0;
ASSERT_STREQ(btf__str_by_offset(btf, v64->name_off), "v1", "v1_name");
ASSERT_EQ(v64->val_hi32, 0xffffffff, "v1_val");
ASSERT_EQ(v64->val_lo32, 0xffffffff, "v1_val");
v64 = btf_enum64(t) + 1;
ASSERT_STREQ(btf__str_by_offset(btf, v64->name_off), "v2", "v2_name");
ASSERT_EQ(v64->val_hi32, 0x1, "v2_val");
ASSERT_EQ(v64->val_lo32, 0x23456789, "v2_val");
v64 = btf_enum64(t) + 0;
ASSERT_STREQ(btf__str_by_offset(btf, v64->name_off), "v1", "v1_name");
ASSERT_EQ(v64->val_hi32, 0xffffffff, "v1_val");
ASSERT_EQ(v64->val_lo32, 0xffffffff, "v1_val");