Symbol: v5
arch/loongarch/lib/xor_template.c
101
[v5] "r"(v5) : "memory"
arch/loongarch/lib/xor_template.c
108
v5 += LINE_WIDTH / sizeof(unsigned long);
arch/loongarch/lib/xor_template.c
88
const unsigned long * __restrict v5)
arch/loongarch/lib/xor_template.c
98
LD_AND_XOR_LINE(v5)
arch/powerpc/lib/xor_vmx.c
135
DEFINE(v5);
arch/powerpc/lib/xor_vmx.c
143
LOAD(v5);
arch/powerpc/lib/xor_vmx.c
146
XOR(v1, v5);
arch/powerpc/lib/xor_vmx.c
154
v5 += 4;
arch/s390/include/asm/fpu-insn-asm.h
109
.ifc \vxr,%v5
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1010
struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5 v5;
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1058
args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock);
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1060
args.v5.ucInputFlag = ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN;
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1066
dividers->post_div = args.v5.ucPostDiv;
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1067
dividers->enable_post_div = (args.v5.ucCntlFlag &
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1069
dividers->enable_dithen = (args.v5.ucCntlFlag &
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1071
dividers->whole_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDiv);
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1072
dividers->frac_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDivFrac);
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1073
dividers->ref_div = args.v5.ucRefDiv;
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
1074
dividers->vco_mode = (args.v5.ucCntlFlag &
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
462
PIXEL_CLOCK_PARAMETERS_V5 v5;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
491
args.v5.ucCRTC = ATOM_CRTC_INVALID;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
492
args.v5.usPixelClock = cpu_to_le16(dispclk);
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
493
args.v5.ucPpll = ATOM_DCPLL;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
643
args.v5.ucCRTC = crtc_id;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
644
args.v5.usPixelClock = cpu_to_le16(clock / 10);
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
645
args.v5.ucRefDiv = ref_div;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
646
args.v5.usFbDiv = cpu_to_le16(fb_div);
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
647
args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000);
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
648
args.v5.ucPostDiv = post_div;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
649
args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
652
args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_REF_DIV_SRC;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
657
args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_24BPP;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
661
args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_32BPP;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
665
args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
669
args.v5.ucTransmitterID = encoder_id;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
670
args.v5.ucEncoderMode = encoder_mode;
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
671
args.v5.ucPpll = pll_id;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1025
args.v5.ucAction = action;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1027
args.v5.usSymClock = cpu_to_le16(dp_clock / 10);
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1029
args.v5.usSymClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1034
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYB;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1036
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYA;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1040
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYD;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1042
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYC;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1046
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYF;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1048
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYE;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1051
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYG;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1055
args.v5.ucLaneNum = dp_lane_count;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1057
args.v5.ucLaneNum = 8;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1059
args.v5.ucLaneNum = 4;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1060
args.v5.ucConnObjId = connector_object_id;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1061
args.v5.ucDigMode = amdgpu_atombios_encoder_get_encoder_mode(encoder);
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1064
args.v5.asConfig.ucPhyClkSrcId = ENCODER_REFCLK_SRC_EXTCLK;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1066
args.v5.asConfig.ucPhyClkSrcId = pll_id;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1069
args.v5.asConfig.ucCoherentMode = 1; /* DP requires coherent */
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1072
args.v5.asConfig.ucCoherentMode = 1;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1075
args.v5.asConfig.ucHPDSel = 0;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1077
args.v5.asConfig.ucHPDSel = hpd_id + 1;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1078
args.v5.ucDigEncoderSel = 1 << dig_encoder;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
1079
args.v5.ucDPLaneSet = lane_set;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
556
DIG_ENCODER_CONTROL_PARAMETERS_V5 v5;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
687
args.v5.asDPPanelModeParam.ucAction = action;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
688
args.v5.asDPPanelModeParam.ucPanelMode = panel_mode;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
689
args.v5.asDPPanelModeParam.ucDigId = dig->dig_encoder;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
692
args.v5.asStreamParam.ucAction = action;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
693
args.v5.asStreamParam.ucDigId = dig->dig_encoder;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
694
args.v5.asStreamParam.ucDigMode =
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
696
if (ENCODER_MODE_IS_DP(args.v5.asStreamParam.ucDigMode))
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
697
args.v5.asStreamParam.ucLaneNum = dp_lane_count;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
700
args.v5.asStreamParam.ucLaneNum = 8;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
702
args.v5.asStreamParam.ucLaneNum = 4;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
703
args.v5.asStreamParam.ulPixelClock =
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
705
args.v5.asStreamParam.ucBitPerColor =
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
707
args.v5.asStreamParam.ucLinkRateIn270Mhz = dp_clock / 27000;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
717
args.v5.asCmdParam.ucAction = action;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
718
args.v5.asCmdParam.ucDigId = dig->dig_encoder;
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
744
DIG_TRANSMITTER_CONTROL_PARAMETERS_V1_5 v5;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_math.c
101
return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, v2, v3) : dcn_bw_max2(v4, v5);
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_math.c
99
float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5)
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_standalone_libraries/lib_float_math.c
79
double math_max5(double v1, double v2, double v3, double v4, double v5)
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_standalone_libraries/lib_float_math.c
81
return math_max3(v1, v2, v3) > math_max2(v4, v5) ? math_max3(v1, v2, v3) : math_max2(v4, v5);
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_standalone_libraries/lib_float_math.h
17
double math_max5(double v1, double v2, double v3, double v4, double v5);
drivers/gpu/drm/amd/display/dc/inc/dcn_calc_math.h
38
float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5);
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
101
FN(reg, f5), v5,\
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
105
f5, v5, f6, v6, f7, v7) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
111
FN(reg, f5), v5,\
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
116
f5, v5, f6, v6, f7, v7, f8, v8) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
122
FN(reg, f5), v5,\
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
128
v5, f6, v6, f7, v7, f8, v8, f9, v9) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
134
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
141
v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
147
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
178
#define REG_GET_5(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
184
FN(reg_name, f5), v5)
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
186
#define REG_GET_6(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
192
FN(reg_name, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
195
#define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
201
FN(reg_name, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
205
#define REG_GET_8(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
211
FN(reg_name, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
252
#define REG_UPDATE_5(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
258
FN(reg, f5), v5)
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
260
#define REG_UPDATE_6(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
266
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
269
#define REG_UPDATE_7(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
275
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
279
#define REG_UPDATE_8(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
285
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
290
#define REG_UPDATE_9(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
296
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
302
#define REG_UPDATE_10(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10)\
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
308
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
315
#define REG_UPDATE_14(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
322
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
333
#define REG_UPDATE_19(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
340
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
356
#define REG_UPDATE_20(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10,\
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
363
FN(reg, f5), v5, \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
86
f5, v5) \
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
92
FN(reg, f5), v5)
drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
95
f5, v5, f6, v6) \
drivers/gpu/drm/radeon/atombios_crtc.c
759
PIXEL_CLOCK_PARAMETERS_V5 v5;
drivers/gpu/drm/radeon/atombios_crtc.c
787
args.v5.ucCRTC = ATOM_CRTC_INVALID;
drivers/gpu/drm/radeon/atombios_crtc.c
788
args.v5.usPixelClock = cpu_to_le16(dispclk);
drivers/gpu/drm/radeon/atombios_crtc.c
789
args.v5.ucPpll = ATOM_DCPLL;
drivers/gpu/drm/radeon/atombios_crtc.c
883
args.v5.ucCRTC = crtc_id;
drivers/gpu/drm/radeon/atombios_crtc.c
884
args.v5.usPixelClock = cpu_to_le16(clock / 10);
drivers/gpu/drm/radeon/atombios_crtc.c
885
args.v5.ucRefDiv = ref_div;
drivers/gpu/drm/radeon/atombios_crtc.c
886
args.v5.usFbDiv = cpu_to_le16(fb_div);
drivers/gpu/drm/radeon/atombios_crtc.c
887
args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000);
drivers/gpu/drm/radeon/atombios_crtc.c
888
args.v5.ucPostDiv = post_div;
drivers/gpu/drm/radeon/atombios_crtc.c
889
args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */
drivers/gpu/drm/radeon/atombios_crtc.c
891
args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_REF_DIV_SRC;
drivers/gpu/drm/radeon/atombios_crtc.c
896
args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_24BPP;
drivers/gpu/drm/radeon/atombios_crtc.c
900
args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_32BPP;
drivers/gpu/drm/radeon/atombios_crtc.c
904
args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP;
drivers/gpu/drm/radeon/atombios_crtc.c
908
args.v5.ucTransmitterID = encoder_id;
drivers/gpu/drm/radeon/atombios_crtc.c
909
args.v5.ucEncoderMode = encoder_mode;
drivers/gpu/drm/radeon/atombios_crtc.c
910
args.v5.ucPpll = pll_id;
drivers/gpu/drm/radeon/atombios_encoders.c
1298
args.v5.ucAction = action;
drivers/gpu/drm/radeon/atombios_encoders.c
1300
args.v5.usSymClock = cpu_to_le16(dp_clock / 10);
drivers/gpu/drm/radeon/atombios_encoders.c
1302
args.v5.usSymClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
drivers/gpu/drm/radeon/atombios_encoders.c
1307
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYB;
drivers/gpu/drm/radeon/atombios_encoders.c
1309
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYA;
drivers/gpu/drm/radeon/atombios_encoders.c
1313
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYD;
drivers/gpu/drm/radeon/atombios_encoders.c
1315
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYC;
drivers/gpu/drm/radeon/atombios_encoders.c
1319
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYF;
drivers/gpu/drm/radeon/atombios_encoders.c
1321
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYE;
drivers/gpu/drm/radeon/atombios_encoders.c
1324
args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYG;
drivers/gpu/drm/radeon/atombios_encoders.c
1328
args.v5.ucLaneNum = dp_lane_count;
drivers/gpu/drm/radeon/atombios_encoders.c
1330
args.v5.ucLaneNum = 8;
drivers/gpu/drm/radeon/atombios_encoders.c
1332
args.v5.ucLaneNum = 4;
drivers/gpu/drm/radeon/atombios_encoders.c
1333
args.v5.ucConnObjId = connector_object_id;
drivers/gpu/drm/radeon/atombios_encoders.c
1334
args.v5.ucDigMode = atombios_get_encoder_mode(encoder);
drivers/gpu/drm/radeon/atombios_encoders.c
1337
args.v5.asConfig.ucPhyClkSrcId = ENCODER_REFCLK_SRC_EXTCLK;
drivers/gpu/drm/radeon/atombios_encoders.c
1339
args.v5.asConfig.ucPhyClkSrcId = pll_id;
drivers/gpu/drm/radeon/atombios_encoders.c
1342
args.v5.asConfig.ucCoherentMode = 1; /* DP requires coherent */
drivers/gpu/drm/radeon/atombios_encoders.c
1345
args.v5.asConfig.ucCoherentMode = 1;
drivers/gpu/drm/radeon/atombios_encoders.c
1348
args.v5.asConfig.ucHPDSel = 0;
drivers/gpu/drm/radeon/atombios_encoders.c
1350
args.v5.asConfig.ucHPDSel = hpd_id + 1;
drivers/gpu/drm/radeon/atombios_encoders.c
1351
args.v5.ucDigEncoderSel = (fe != -1) ? (1 << fe) : (1 << dig_encoder);
drivers/gpu/drm/radeon/atombios_encoders.c
1352
args.v5.ucDPLaneSet = lane_set;
drivers/gpu/drm/radeon/atombios_encoders.c
997
DIG_TRANSMITTER_CONTROL_PARAMETERS_V1_5 v5;
drivers/gpu/drm/radeon/radeon_atombios.c
2820
struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5 v5;
drivers/gpu/drm/radeon/radeon_atombios.c
2892
args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock);
drivers/gpu/drm/radeon/radeon_atombios.c
2894
args.v5.ucInputFlag = ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN;
drivers/gpu/drm/radeon/radeon_atombios.c
2898
dividers->post_div = args.v5.ucPostDiv;
drivers/gpu/drm/radeon/radeon_atombios.c
2899
dividers->enable_post_div = (args.v5.ucCntlFlag &
drivers/gpu/drm/radeon/radeon_atombios.c
2901
dividers->enable_dithen = (args.v5.ucCntlFlag &
drivers/gpu/drm/radeon/radeon_atombios.c
2903
dividers->whole_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDiv);
drivers/gpu/drm/radeon/radeon_atombios.c
2904
dividers->frac_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDivFrac);
drivers/gpu/drm/radeon/radeon_atombios.c
2905
dividers->ref_div = args.v5.ucRefDiv;
drivers/gpu/drm/radeon/radeon_atombios.c
2906
dividers->vco_mode = (args.v5.ucCntlFlag &
drivers/input/rmi4/rmi_f34.c
109
ret = rmi_read(f34->fn->rmi_dev, f34->v5.ctrl_address,
drivers/input/rmi4/rmi_f34.c
115
complete(&f34->v5.cmd_done);
drivers/input/rmi4/rmi_f34.c
150
data, f34->v5.block_size);
drivers/input/rmi4/rmi_f34.c
168
data += f34->v5.block_size;
drivers/input/rmi4/rmi_f34.c
169
f34->update_progress += f34->v5.block_size;
drivers/input/rmi4/rmi_f34.c
179
return rmi_f34_write_blocks(f34, data, f34->v5.fw_blocks,
drivers/input/rmi4/rmi_f34.c
185
return rmi_f34_write_blocks(f34, data, f34->v5.config_blocks,
drivers/input/rmi4/rmi_f34.c
266
if (image_size && image_size != f34->v5.fw_blocks * f34->v5.block_size) {
drivers/input/rmi4/rmi_f34.c
269
image_size, f34->v5.fw_blocks * f34->v5.block_size);
drivers/input/rmi4/rmi_f34.c
274
config_size != f34->v5.config_blocks * f34->v5.block_size) {
drivers/input/rmi4/rmi_f34.c
278
f34->v5.config_blocks * f34->v5.block_size);
drivers/input/rmi4/rmi_f34.c
289
guard(mutex)(&f34->v5.flash_mutex);
drivers/input/rmi4/rmi_f34.c
538
mutex_init(&f34->v5.flash_mutex);
drivers/input/rmi4/rmi_f34.c
539
init_completion(&f34->v5.cmd_done);
drivers/input/rmi4/rmi_f34.c
541
f34->v5.block_size = get_unaligned_le16(&f34_queries[3]);
drivers/input/rmi4/rmi_f34.c
542
f34->v5.fw_blocks = get_unaligned_le16(&f34_queries[5]);
drivers/input/rmi4/rmi_f34.c
543
f34->v5.config_blocks = get_unaligned_le16(&f34_queries[7]);
drivers/input/rmi4/rmi_f34.c
544
f34->v5.ctrl_address = fn->fd.data_base_addr + F34_BLOCK_DATA_OFFSET +
drivers/input/rmi4/rmi_f34.c
545
f34->v5.block_size;
drivers/input/rmi4/rmi_f34.c
551
f34->v5.block_size);
drivers/input/rmi4/rmi_f34.c
553
f34->v5.fw_blocks);
drivers/input/rmi4/rmi_f34.c
555
f34->v5.config_blocks);
drivers/input/rmi4/rmi_f34.c
59
init_completion(&f34->v5.cmd_done);
drivers/input/rmi4/rmi_f34.c
61
ret = rmi_read(rmi_dev, f34->v5.ctrl_address, &f34->v5.status);
drivers/input/rmi4/rmi_f34.c
69
f34->v5.status |= command & 0x0f;
drivers/input/rmi4/rmi_f34.c
71
ret = rmi_write(rmi_dev, f34->v5.ctrl_address, f34->v5.status);
drivers/input/rmi4/rmi_f34.c
79
if (!wait_for_completion_timeout(&f34->v5.cmd_done,
drivers/input/rmi4/rmi_f34.c
82
ret = rmi_read(rmi_dev, f34->v5.ctrl_address, &f34->v5.status);
drivers/input/rmi4/rmi_f34.c
90
if (f34->v5.status & 0x7f) {
drivers/input/rmi4/rmi_f34.c
93
__func__, command, f34->v5.status);
drivers/input/rmi4/rmi_f34.h
286
struct f34v5_data v5;
drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil_types.h
683
} v5;
drivers/net/wireless/intel/iwlwifi/fw/api/power.h
383
struct iwl_dev_tx_power_cmd_v5 v5;
drivers/net/wireless/intel/iwlwifi/fw/api/power.h
532
struct iwl_geo_tx_power_profiles_cmd_v5 v5;
drivers/net/wireless/intel/iwlwifi/fw/api/power.h
595
} __packed v5; /* PER_PLAT_ANTENNA_GAIN_CMD_API_S_VER_5 */
drivers/net/wireless/intel/iwlwifi/fw/api/scan.h
772
} __packed v5; /* SCAN_CHANNEL_CONFIG_API_S_VER_5 */
drivers/net/wireless/intel/iwlwifi/fw/regulatory.c
367
gain = cmd->v5.gain[0];
drivers/net/wireless/intel/iwlwifi/fw/regulatory.c
368
*cmd_size = sizeof(cmd->v5);
drivers/net/wireless/intel/iwlwifi/fw/regulatory.c
369
cmd->v5.flags = cpu_to_le32(fwrt->ppag_flags & IWL_PPAG_CMD_V5_MASK);
drivers/net/wireless/intel/iwlwifi/mld/regulatory.c
77
.v5.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
drivers/net/wireless/intel/iwlwifi/mld/regulatory.c
78
.v5.table_revision = sk,
drivers/net/wireless/intel/iwlwifi/mld/regulatory.c
82
ret = iwl_sar_geo_fill_table(&mld->fwrt, &cmd.v5.table[0][0],
drivers/net/wireless/intel/iwlwifi/mld/regulatory.c
83
ARRAY_SIZE(cmd.v5.table[0]),
drivers/net/wireless/intel/iwlwifi/mld/regulatory.c
92
return iwl_mld_send_cmd_pdu(mld, cmd_id, &cmd, sizeof(cmd.v5));
drivers/net/wireless/intel/iwlwifi/mld/scan.c
1052
cfg->v5.psd_20 = psd_20;
drivers/net/wireless/intel/iwlwifi/mld/scan.c
1138
cfg->v5.iter_count = 1;
drivers/net/wireless/intel/iwlwifi/mld/scan.c
1139
cfg->v5.iter_interval = 0;
drivers/net/wireless/intel/iwlwifi/mld/scan.c
1140
cfg->v5.psd_20 =
drivers/net/wireless/intel/iwlwifi/mld/scan.c
900
cfg->v5.iter_count = 1;
drivers/net/wireless/intel/iwlwifi/mld/scan.c
901
cfg->v5.iter_interval = 0;
drivers/net/wireless/intel/iwlwifi/mvm/fw.c
872
len = sizeof(cmd.v5);
drivers/net/wireless/intel/iwlwifi/mvm/fw.c
874
per_chain = cmd.v5.per_chain[0][0];
drivers/net/wireless/intel/iwlwifi/mvm/fw.c
927
len = sizeof(geo_tx_cmd.v5);
drivers/net/wireless/intel/iwlwifi/mvm/fw.c
988
len = sizeof(cmd.v5);
drivers/net/wireless/intel/iwlwifi/mvm/fw.c
989
n_bands = ARRAY_SIZE(cmd.v5.table[0]);
drivers/net/wireless/intel/iwlwifi/mvm/fw.c
991
cmd.v5.table_revision = sk;
drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c
1484
len = sizeof(cmd.v5);
drivers/net/wireless/intel/iwlwifi/mvm/scan.c
1798
cfg->v5.iter_count = 1;
drivers/net/wireless/intel/iwlwifi/mvm/scan.c
1799
cfg->v5.iter_interval = 0;
drivers/net/wireless/intel/iwlwifi/mvm/scan.c
1952
cfg->v5.psd_20 = psd_20;
drivers/net/wireless/intel/iwlwifi/mvm/scan.c
2480
cfg->v5.iter_count = 1;
drivers/net/wireless/intel/iwlwifi/mvm/scan.c
2481
cfg->v5.iter_interval = 0;
drivers/net/wireless/intel/iwlwifi/mvm/scan.c
2489
cfg->v5.psd_20 =
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c
858
u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0;
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c
869
v5 = phy_regarray_table_pg[i+4];
drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c
874
v4, v5, v6);
drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
712
u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0;
drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
723
v5 = phy_regarray_table_pg[i+4];
drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c
732
v1, v2, v3, v4, v5, v6);
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c
1984
u32 v1, v2, v3, v4, v5, v6;
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c
2004
v5 = array[i+4];
drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c
2029
v4, v5, v6);
drivers/net/wireless/realtek/rtw89/coex.c
10236
pcysta = &pfwinfo->rpt_fbtc_cysta.finfo.v5;
drivers/net/wireless/realtek/rtw89/coex.c
11341
prptctrl = &pfwinfo->rpt_ctrl.finfo.v5;
drivers/net/wireless/realtek/rtw89/coex.c
1462
pfinfo = &pfwinfo->rpt_ctrl.finfo.v5;
drivers/net/wireless/realtek/rtw89/coex.c
1463
pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v5);
drivers/net/wireless/realtek/rtw89/coex.c
1464
fwsubver->fcxbtcrpt = pfwinfo->rpt_ctrl.finfo.v5.fver;
drivers/net/wireless/realtek/rtw89/coex.c
1533
pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v5;
drivers/net/wireless/realtek/rtw89/coex.c
1534
pcysta->v5 = pfwinfo->rpt_fbtc_cysta.finfo.v5;
drivers/net/wireless/realtek/rtw89/coex.c
1535
pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v5);
drivers/net/wireless/realtek/rtw89/coex.c
1536
fwsubver->fcxcysta = pfwinfo->rpt_fbtc_cysta.finfo.v5.fver;
drivers/net/wireless/realtek/rtw89/coex.c
1761
prpt->v5 = pfwinfo->rpt_ctrl.finfo.v5;
drivers/net/wireless/realtek/rtw89/coex.c
1762
pfwinfo->rpt_en_map = le32_to_cpu(prpt->v5.rpt_info.en);
drivers/net/wireless/realtek/rtw89/coex.c
1763
wl->ver_info.fw_coex = le32_to_cpu(prpt->v5.rpt_info.cx_ver);
drivers/net/wireless/realtek/rtw89/coex.c
1764
wl->ver_info.fw = le32_to_cpu(prpt->v5.rpt_info.fw_ver);
drivers/net/wireless/realtek/rtw89/coex.c
1768
memcpy(&dm->gnt.band[i], &prpt->v5.gnt_val[i][0],
drivers/net/wireless/realtek/rtw89/coex.c
1772
le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_HI_TX]);
drivers/net/wireless/realtek/rtw89/coex.c
1774
le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_HI_RX]);
drivers/net/wireless/realtek/rtw89/coex.c
1776
le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_LO_TX]);
drivers/net/wireless/realtek/rtw89/coex.c
1778
le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_LO_RX]);
drivers/net/wireless/realtek/rtw89/coex.c
1780
le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_POLLUTED]);
drivers/net/wireless/realtek/rtw89/coex.c
2057
cnt_leak_slot = le16_to_cpu(pcysta->v5.slot_cnt[CXST_LK]);
drivers/net/wireless/realtek/rtw89/coex.c
2058
cnt_rx_imr = le32_to_cpu(pcysta->v5.leak_slot.cnt_rximr);
drivers/net/wireless/realtek/rtw89/coex.c
2063
if (le16_to_cpu(pcysta->v5.cycles) >= BTC_CYSTA_CHK_PERIOD &&
drivers/net/wireless/realtek/rtw89/coex.c
2074
wl_slot_real = le16_to_cpu(pcysta->v5.cycle_time.tavg[CXT_WL]);
drivers/net/wireless/realtek/rtw89/coex.c
2085
bt_slot_real = le16_to_cpu(pcysta->v5.cycle_time.tavg[CXT_BT]);
drivers/net/wireless/realtek/rtw89/coex.c
2098
le16_to_cpu(pcysta->v5.slot_cnt[CXST_E2G]));
drivers/net/wireless/realtek/rtw89/coex.c
2100
le16_to_cpu(pcysta->v5.slot_cnt[CXST_W1]));
drivers/net/wireless/realtek/rtw89/coex.c
2102
le16_to_cpu(pcysta->v5.slot_cnt[CXST_B1]));
drivers/net/wireless/realtek/rtw89/coex.c
2104
le16_to_cpu(pcysta->v5.cycles));
drivers/net/wireless/realtek/rtw89/coex.c
9683
pcysta->v5 = pfwinfo->rpt_fbtc_cysta.finfo.v5;
drivers/net/wireless/realtek/rtw89/coex.c
9684
except_cnt = pcysta->v5.except_cnt;
drivers/net/wireless/realtek/rtw89/coex.c
9685
exception_map = le32_to_cpu(pcysta->v5.except_map);
drivers/net/wireless/realtek/rtw89/core.h
2405
struct rtw89_btc_fbtc_rpt_ctrl_v5 v5;
drivers/net/wireless/realtek/rtw89/core.h
2879
struct rtw89_btc_fbtc_cysta_v5 v5;
drivers/ufs/host/ufs-mediatek-sip.h
50
unsigned long v5;
drivers/ufs/host/ufs-mediatek-sip.h
60
s.v1, s.v2, s.v3, s.v4, s.v5, s.v6, s.res);
drivers/video/fbdev/sis/sis_main.c
4321
u8 reg, v1, v2, v3, v4, v5, v6, v7, v8;
drivers/video/fbdev/sis/sis_main.c
4342
v4 = 0x44; v5 = 0x42;
drivers/video/fbdev/sis/sis_main.c
4345
v4 = 0x68; v5 = 0x43; /* Assume 125Mhz ECLK */
drivers/video/fbdev/sis/sis_main.c
4354
v5 = bios[rindex++];
drivers/video/fbdev/sis/sis_main.c
4362
SiS_SetReg(SISSR, 0x2f, v5);
drivers/video/fbdev/sis/sis_main.c
4373
v5 = 0x06; v6 = 0x00; v7 = 0x00; v8 = 0x00;
drivers/video/fbdev/sis/sis_main.c
4380
v5 = bios[memtype + 32];
drivers/video/fbdev/sis/sis_main.c
4391
SiS_SetReg(SISSR, 0x19, v5);
drivers/video/fbdev/sis/sis_main.c
4435
v4 = 0x00; v5 = 0x00; v6 = 0x10;
drivers/video/fbdev/sis/sis_main.c
4438
v5 = bios[0xf6];
drivers/video/fbdev/sis/sis_main.c
4442
SiS_SetReg(SISPART4, 0x0e, v5);
drivers/video/fbdev/sis/sis_main.c
5079
u8 v1, v2, v3, v4, v5, reg, ramtype;
drivers/video/fbdev/sis/sis_main.c
5595
v1 = 0x31; v2 = 0x03; v3 = 0x83; v4 = 0x03; v5 = 0x83;
drivers/video/fbdev/sis/sis_main.c
5602
v5 = bios[index + 3];
drivers/video/fbdev/sis/sis_main.c
5614
SiS_SetReg(SISSR, 0x16, v5);
security/apparmor/policy_unpack.c
1452
if (VERSION_LT(e->version, v5) || VERSION_GT(e->version, v9)) {
tools/testing/selftests/riscv/vector/v_exec_initval_nolibc.c
59
CHECK_VECTOR_REGISTER(v5);