CV1800_BYPASS_DIV
static CV1800_BYPASS_DIV(clk_axi6, clk_bypass_fpll_parents,
static CV1800_BYPASS_DIV(clk_src_rtc_sys_0, clk_bypass_fpll_parents,
static CV1800_BYPASS_DIV(clk_eth0_500m, clk_bypass_fpll_parents,
static CV1800_BYPASS_DIV(clk_eth1_500m, clk_bypass_fpll_parents,
static CV1800_BYPASS_DIV(clk_spi, clk_bypass_fpll_parents,
static CV1800_BYPASS_DIV(clk_ap_debug, clk_bypass_fpll_parents,
static CV1800_BYPASS_DIV(clk_i2c, clk_bypass_axi6_bus_parents,
static CV1800_BYPASS_DIV(clk_dsi_esc, clk_bypass_axi6_bus_parents,
static CV1800_BYPASS_DIV(clk_disp_src_vip, clk_disp_vip_parents,
static CV1800_BYPASS_DIV(clk_cpu_axi0, clk_axi4_parents,
static CV1800_BYPASS_DIV(clk_cpu_gic, clk_bypass_fpll_parents,