v10
.ifc \vxr,%v10
struct atom_vram_module_v10 v10;
((u8 *)vram_module + vram_module->v10.vram_module_size);
mem_type = vram_module->v10.memory_type;
mem_channel_number = vram_module->v10.channel_num;
mem_channel_width = vram_module->v10.channel_width;
mem_vendor = (vram_module->v10.vender_rev_id) & 0xF;
v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10) \
FN(reg, f10), v10)
#define REG_UPDATE_10(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10)\
FN(reg, f10), v10)
v10, f11, v11, f12, v12, f13, v13, f14, v14)\
FN(reg, f10), v10, \
v10, f11, v11, f12, v12, f13, v13, f14, v14, f15, v15, f16, v16, f17, v17, f18, v18, f19, v19)\
FN(reg, f10), v10, \
v10, f11, v11, f12, v12, f13, v13, f14, v14, f15, v15, f16, v16, f17, v17, f18, v18, f19, v19, f20, v20)\
FN(reg, f10), v10, \
struct iwl_dev_tx_power_cmd_v10 v10;
int len = sizeof(cmd.common) + sizeof(cmd.v10);
.v10.flags = cpu_to_le32(mld->fwrt.reduced_power_flags),
ret = iwl_sar_fill_profile(&mld->fwrt, &cmd.v10.per_chain[0][0][0],
sizeof(cmd.common) + sizeof(cmd.v10));
len = sizeof(cmd_v9_v10.v10);
per_chain = &cmd_v9_v10.v10.per_chain[0][0][0];
cmd_v9_v10.v10.flags =
len = sizeof(cmd_v9_v10.v10);
[SND_DJM_V10_IDX] = SND_DJM_DEVICE(v10),
CHECK_VECTOR_REGISTER(v10);