drivers/gpu/drm/drm_atomic_state_helper.c
526
state->tv.mode = cmdline->tv_mode;
drivers/gpu/drm/drm_connector.c
2271
struct drm_property *tv_mode;
drivers/gpu/drm/drm_connector.c
2286
tv_mode = drm_property_create_enum(dev, 0, "TV mode",
drivers/gpu/drm/drm_connector.c
2288
if (!tv_mode)
drivers/gpu/drm/drm_connector.c
2291
dev->mode_config.tv_mode_property = tv_mode;
drivers/gpu/drm/drm_modes.c
2160
mode->tv_mode = ret;
drivers/gpu/drm/drm_modes.c
2265
unsigned int tv_mode;
drivers/gpu/drm/drm_modes.c
2275
.tv_mode = _mode, \
drivers/gpu/drm/drm_modes.c
2327
cmdline_mode->tv_mode = mode->tv_mode;
drivers/gpu/drm/drm_modes.c
2521
named_mode->tv_mode,
drivers/gpu/drm/drm_modes.c
546
enum drm_connector_tv_mode tv_mode,
drivers/gpu/drm/drm_modes.c
556
switch (tv_mode) {
drivers/gpu/drm/drm_probe_helper.c
1268
default_mode = cmdline->tv_mode;
drivers/gpu/drm/i915/display/intel_tv.c
1009
tv_mode->hblank_start - tv_mode->hblank_end;
drivers/gpu/drm/i915/display/intel_tv.c
1011
tv_mode->htotal - tv_mode->hblank_start;
drivers/gpu/drm/i915/display/intel_tv.c
1013
tv_mode->hsync_end;
drivers/gpu/drm/i915/display/intel_tv.c
1014
mode->htotal = tv_mode->htotal + 1;
drivers/gpu/drm/i915/display/intel_tv.c
1027
mode->vdisplay = intel_tv_mode_vdisplay(tv_mode);
drivers/gpu/drm/i915/display/intel_tv.c
1028
if (tv_mode->progressive) {
drivers/gpu/drm/i915/display/intel_tv.c
1030
tv_mode->vsync_start_f1 + 1;
drivers/gpu/drm/i915/display/intel_tv.c
1032
tv_mode->vsync_len;
drivers/gpu/drm/i915/display/intel_tv.c
1034
tv_mode->vi_end_f1 + 1;
drivers/gpu/drm/i915/display/intel_tv.c
1037
tv_mode->vsync_start_f1 + 1 +
drivers/gpu/drm/i915/display/intel_tv.c
1038
tv_mode->vsync_start_f2 + 1;
drivers/gpu/drm/i915/display/intel_tv.c
1040
2 * tv_mode->vsync_len;
drivers/gpu/drm/i915/display/intel_tv.c
1042
tv_mode->vi_end_f1 + 1 +
drivers/gpu/drm/i915/display/intel_tv.c
1043
tv_mode->vi_end_f2 + 1;
drivers/gpu/drm/i915/display/intel_tv.c
1052
tv_mode->progressive ? 'p' : 'i',
drivers/gpu/drm/i915/display/intel_tv.c
1053
tv_mode->name);
drivers/gpu/drm/i915/display/intel_tv.c
1099
struct tv_mode tv_mode = {};
drivers/gpu/drm/i915/display/intel_tv.c
1112
tv_mode.htotal = (hctl1 & TV_HTOTAL_MASK) >> TV_HTOTAL_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1113
tv_mode.hsync_end = (hctl1 & TV_HSYNC_END_MASK) >> TV_HSYNC_END_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1115
tv_mode.hblank_start = (hctl3 & TV_HBLANK_START_MASK) >> TV_HBLANK_START_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1116
tv_mode.hblank_end = (hctl3 & TV_HSYNC_END_MASK) >> TV_HBLANK_END_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1118
tv_mode.nbr_end = (vctl1 & TV_NBR_END_MASK) >> TV_NBR_END_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1119
tv_mode.vi_end_f1 = (vctl1 & TV_VI_END_F1_MASK) >> TV_VI_END_F1_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1120
tv_mode.vi_end_f2 = (vctl1 & TV_VI_END_F2_MASK) >> TV_VI_END_F2_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1122
tv_mode.vsync_len = (vctl2 & TV_VSYNC_LEN_MASK) >> TV_VSYNC_LEN_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1123
tv_mode.vsync_start_f1 = (vctl2 & TV_VSYNC_START_F1_MASK) >> TV_VSYNC_START_F1_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1124
tv_mode.vsync_start_f2 = (vctl2 & TV_VSYNC_START_F2_MASK) >> TV_VSYNC_START_F2_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1126
tv_mode.clock = pipe_config->port_clock;
drivers/gpu/drm/i915/display/intel_tv.c
1128
tv_mode.progressive = tv_ctl & TV_PROGRESSIVE;
drivers/gpu/drm/i915/display/intel_tv.c
1132
tv_mode.oversample = 8;
drivers/gpu/drm/i915/display/intel_tv.c
1135
tv_mode.oversample = 4;
drivers/gpu/drm/i915/display/intel_tv.c
1138
tv_mode.oversample = 2;
drivers/gpu/drm/i915/display/intel_tv.c
1141
tv_mode.oversample = 1;
drivers/gpu/drm/i915/display/intel_tv.c
1153
intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock);
drivers/gpu/drm/i915/display/intel_tv.c
1179
static bool intel_tv_vert_scaling(const struct drm_display_mode *tv_mode,
drivers/gpu/drm/i915/display/intel_tv.c
1183
return tv_mode->crtc_vdisplay -
drivers/gpu/drm/i915/display/intel_tv.c
1200
const struct tv_mode *tv_mode = intel_tv_mode_find(conn_state);
drivers/gpu/drm/i915/display/intel_tv.c
1207
if (!tv_mode)
drivers/gpu/drm/i915/display/intel_tv.c
1219
pipe_config->port_clock = tv_mode->clock;
drivers/gpu/drm/i915/display/intel_tv.c
1227
intel_tv_mode_to_mode(adjusted_mode, tv_mode, pipe_config->port_clock);
drivers/gpu/drm/i915/display/intel_tv.c
1259
if (!tv_mode->progressive) {
drivers/gpu/drm/i915/display/intel_tv.c
1358
const struct tv_mode *tv_mode,
drivers/gpu/drm/i915/display/intel_tv.c
1364
hctl1 = (tv_mode->hsync_end << TV_HSYNC_END_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1365
(tv_mode->htotal << TV_HTOTAL_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1367
hctl2 = (tv_mode->hburst_start << 16) |
drivers/gpu/drm/i915/display/intel_tv.c
1368
(tv_mode->hburst_len << TV_HBURST_LEN_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1373
hctl3 = (tv_mode->hblank_start << TV_HBLANK_START_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1374
(tv_mode->hblank_end << TV_HBLANK_END_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1376
vctl1 = (tv_mode->nbr_end << TV_NBR_END_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1377
(tv_mode->vi_end_f1 << TV_VI_END_F1_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1378
(tv_mode->vi_end_f2 << TV_VI_END_F2_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1380
vctl2 = (tv_mode->vsync_len << TV_VSYNC_LEN_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1381
(tv_mode->vsync_start_f1 << TV_VSYNC_START_F1_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1382
(tv_mode->vsync_start_f2 << TV_VSYNC_START_F2_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1384
vctl3 = (tv_mode->veq_len << TV_VEQ_LEN_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1385
(tv_mode->veq_start_f1 << TV_VEQ_START_F1_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1386
(tv_mode->veq_start_f2 << TV_VEQ_START_F2_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1388
if (tv_mode->veq_ena)
drivers/gpu/drm/i915/display/intel_tv.c
1391
vctl4 = (tv_mode->vburst_start_f1 << TV_VBURST_START_F1_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1392
(tv_mode->vburst_end_f1 << TV_VBURST_END_F1_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1394
vctl5 = (tv_mode->vburst_start_f2 << TV_VBURST_START_F2_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1395
(tv_mode->vburst_end_f2 << TV_VBURST_END_F2_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1397
vctl6 = (tv_mode->vburst_start_f3 << TV_VBURST_START_F3_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1398
(tv_mode->vburst_end_f3 << TV_VBURST_END_F3_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1400
vctl7 = (tv_mode->vburst_start_f4 << TV_VBURST_START_F4_SHIFT) |
drivers/gpu/drm/i915/display/intel_tv.c
1401
(tv_mode->vburst_end_f4 << TV_VBURST_END_F4_SHIFT);
drivers/gpu/drm/i915/display/intel_tv.c
1442
const struct tv_mode *tv_mode = intel_tv_mode_find(conn_state);
drivers/gpu/drm/i915/display/intel_tv.c
1460
video_levels = tv_mode->composite_levels;
drivers/gpu/drm/i915/display/intel_tv.c
1461
color_conversion = tv_mode->composite_color;
drivers/gpu/drm/i915/display/intel_tv.c
1462
burst_ena = tv_mode->burst_ena;
drivers/gpu/drm/i915/display/intel_tv.c
1467
if (tv_mode->burst_ena)
drivers/gpu/drm/i915/display/intel_tv.c
1475
video_levels = tv_mode->svideo_levels;
drivers/gpu/drm/i915/display/intel_tv.c
1476
color_conversion = tv_mode->svideo_color;
drivers/gpu/drm/i915/display/intel_tv.c
1477
burst_ena = tv_mode->burst_ena;
drivers/gpu/drm/i915/display/intel_tv.c
1483
switch (tv_mode->oversample) {
drivers/gpu/drm/i915/display/intel_tv.c
1498
if (tv_mode->progressive)
drivers/gpu/drm/i915/display/intel_tv.c
1500
if (tv_mode->trilevel_sync)
drivers/gpu/drm/i915/display/intel_tv.c
1502
if (tv_mode->pal_burst)
drivers/gpu/drm/i915/display/intel_tv.c
1506
if (tv_mode->dda1_inc)
drivers/gpu/drm/i915/display/intel_tv.c
1508
if (tv_mode->dda2_inc)
drivers/gpu/drm/i915/display/intel_tv.c
1510
if (tv_mode->dda3_inc)
drivers/gpu/drm/i915/display/intel_tv.c
1512
scctl1 |= tv_mode->sc_reset;
drivers/gpu/drm/i915/display/intel_tv.c
1515
scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1517
scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT |
drivers/gpu/drm/i915/display/intel_tv.c
1518
tv_mode->dda2_inc << TV_SCDDA2_INC_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1520
scctl3 = tv_mode->dda3_size << TV_SCDDA3_SIZE_SHIFT |
drivers/gpu/drm/i915/display/intel_tv.c
1521
tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT;
drivers/gpu/drm/i915/display/intel_tv.c
1527
set_tv_mode_timings(display, tv_mode, burst_ena);
drivers/gpu/drm/i915/display/intel_tv.c
1552
xsize = tv_mode->hblank_start - tv_mode->hblank_end;
drivers/gpu/drm/i915/display/intel_tv.c
1553
ysize = intel_tv_mode_vdisplay(tv_mode);
drivers/gpu/drm/i915/display/intel_tv.c
1567
tv_mode->filter_table[j++]);
drivers/gpu/drm/i915/display/intel_tv.c
1570
tv_mode->filter_table[j++]);
drivers/gpu/drm/i915/display/intel_tv.c
1573
tv_mode->filter_table[j++]);
drivers/gpu/drm/i915/display/intel_tv.c
1576
tv_mode->filter_table[j++]);
drivers/gpu/drm/i915/display/intel_tv.c
1686
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
drivers/gpu/drm/i915/display/intel_tv.c
1694
if (!tv_mode->component_only)
drivers/gpu/drm/i915/display/intel_tv.c
1698
tv_mode = &tv_modes[i];
drivers/gpu/drm/i915/display/intel_tv.c
1700
if (!tv_mode->component_only)
drivers/gpu/drm/i915/display/intel_tv.c
1768
const struct tv_mode *tv_mode)
drivers/gpu/drm/i915/display/intel_tv.c
1770
int vdisplay = intel_tv_mode_vdisplay(tv_mode);
drivers/gpu/drm/i915/display/intel_tv.c
1781
const struct tv_mode *tv_mode)
drivers/gpu/drm/i915/display/intel_tv.c
1785
if (intel_tv_is_preferred_mode(mode, tv_mode))
drivers/gpu/drm/i915/display/intel_tv.c
1793
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
drivers/gpu/drm/i915/display/intel_tv.c
1801
!tv_mode->progressive &&
drivers/gpu/drm/i915/display/intel_tv.c
1802
!tv_mode->component_only)
drivers/gpu/drm/i915/display/intel_tv.c
1807
input->h > intel_tv_mode_vdisplay(tv_mode))
drivers/gpu/drm/i915/display/intel_tv.c
1821
intel_tv_mode_to_mode(mode, tv_mode, tv_mode->clock);
drivers/gpu/drm/i915/display/intel_tv.c
1829
intel_tv_set_mode_type(mode, tv_mode);
drivers/gpu/drm/i915/display/intel_tv.c
387
static const struct tv_mode tv_modes[] = {
drivers/gpu/drm/i915/display/intel_tv.c
951
static const struct tv_mode *intel_tv_mode_find(const struct drm_connector_state *conn_state)
drivers/gpu/drm/i915/display/intel_tv.c
963
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
drivers/gpu/drm/i915/display/intel_tv.c
975
if (abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000) >= 1000)
drivers/gpu/drm/i915/display/intel_tv.c
982
intel_tv_mode_vdisplay(const struct tv_mode *tv_mode)
drivers/gpu/drm/i915/display/intel_tv.c
984
if (tv_mode->progressive)
drivers/gpu/drm/i915/display/intel_tv.c
985
return tv_mode->nbr_end + 1;
drivers/gpu/drm/i915/display/intel_tv.c
987
return 2 * (tv_mode->nbr_end + 1);
drivers/gpu/drm/i915/display/intel_tv.c
992
const struct tv_mode *tv_mode,
drivers/gpu/drm/i915/display/intel_tv.c
995
mode->clock = clock / (tv_mode->oversample >> !tv_mode->progressive);
drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
205
const struct drm_display_mode *tv_mode;
drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
208
for (tv_mode = nv17_tv_modes; tv_mode->hdisplay; tv_mode++) {
drivers/gpu/drm/nouveau/dispnv04/tvnv17.c
211
mode = drm_mode_duplicate(encoder->dev, tv_mode);
drivers/gpu/drm/radeon/radeon_connectors.c
1088
struct drm_display_mode *tv_mode;
drivers/gpu/drm/radeon/radeon_connectors.c
1101
tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
drivers/gpu/drm/radeon/radeon_connectors.c
1102
if (!tv_mode)
drivers/gpu/drm/radeon/radeon_connectors.c
1104
tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
drivers/gpu/drm/radeon/radeon_connectors.c
1105
drm_mode_probed_add(connector, tv_mode);
drivers/gpu/drm/sun4i/sun4i_tv.c
144
unsigned int tv_mode;
drivers/gpu/drm/sun4i/sun4i_tv.c
205
static const struct tv_mode tv_modes[] = {
drivers/gpu/drm/sun4i/sun4i_tv.c
207
.tv_mode = DRM_MODE_TV_MODE_NTSC,
drivers/gpu/drm/sun4i/sun4i_tv.c
225
.tv_mode = DRM_MODE_TV_MODE_PAL,
drivers/gpu/drm/sun4i/sun4i_tv.c
248
static const struct tv_mode *
drivers/gpu/drm/sun4i/sun4i_tv.c
254
const struct tv_mode *tv_mode = &tv_modes[i];
drivers/gpu/drm/sun4i/sun4i_tv.c
256
if (tv_mode->tv_mode == mode)
drivers/gpu/drm/sun4i/sun4i_tv.c
257
return tv_mode;
drivers/gpu/drm/sun4i/sun4i_tv.c
289
const struct tv_mode *tv_mode =
drivers/gpu/drm/sun4i/sun4i_tv.c
304
tv_mode->mode |
drivers/gpu/drm/sun4i/sun4i_tv.c
305
(tv_mode->yc_en ? SUN4I_TVE_CFG0_YC_EN : 0) |
drivers/gpu/drm/sun4i/sun4i_tv.c
314
(tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) |
drivers/gpu/drm/sun4i/sun4i_tv.c
319
(tv_mode->dac_bit25_en ? BIT(25) : 0) |
drivers/gpu/drm/sun4i/sun4i_tv.c
328
tv_mode->chroma_freq);
drivers/gpu/drm/sun4i/sun4i_tv.c
332
SUN4I_TVE_PORCH_BACK(tv_mode->back_porch) |
drivers/gpu/drm/sun4i/sun4i_tv.c
333
SUN4I_TVE_PORCH_FRONT(tv_mode->front_porch));
drivers/gpu/drm/sun4i/sun4i_tv.c
341
SUN4I_TVE_LEVEL_BLANK(tv_mode->video_levels->blank) |
drivers/gpu/drm/sun4i/sun4i_tv.c
342
SUN4I_TVE_LEVEL_BLACK(tv_mode->video_levels->black));
drivers/gpu/drm/sun4i/sun4i_tv.c
351
SUN4I_TVE_CB_CR_LVL_CB_BURST(tv_mode->burst_levels->cb) |
drivers/gpu/drm/sun4i/sun4i_tv.c
352
SUN4I_TVE_CB_CR_LVL_CR_BURST(tv_mode->burst_levels->cr));
drivers/gpu/drm/sun4i/sun4i_tv.c
361
SUN4I_TVE_CB_CR_GAIN_CB(tv_mode->color_gains->cb) |
drivers/gpu/drm/sun4i/sun4i_tv.c
362
SUN4I_TVE_CB_CR_GAIN_CR(tv_mode->color_gains->cr));
drivers/gpu/drm/sun4i/sun4i_tv.c
366
SUN4I_TVE_SYNC_VBI_VBLANK(tv_mode->vblank_level));
drivers/gpu/drm/sun4i/sun4i_tv.c
380
SUN4I_TVE_RESYNC_PIXEL(tv_mode->resync_params->pixel) |
drivers/gpu/drm/sun4i/sun4i_tv.c
381
SUN4I_TVE_RESYNC_LINE(tv_mode->resync_params->line) |
drivers/gpu/drm/sun4i/sun4i_tv.c
382
(tv_mode->resync_params->field ?
drivers/gpu/drm/tests/drm_cmdline_parser_test.c
1007
.tv_mode = DRM_MODE_TV_MODE_MONOCHROME,
drivers/gpu/drm/tests/drm_cmdline_parser_test.c
1012
.tv_mode = DRM_MODE_TV_MODE_MONOCHROME,
drivers/gpu/drm/tests/drm_cmdline_parser_test.c
953
enum drm_connector_tv_mode tv_mode;
drivers/gpu/drm/tests/drm_cmdline_parser_test.c
974
KUNIT_EXPECT_EQ(test, mode.tv_mode, params->tv_mode);
drivers/gpu/drm/tests/drm_cmdline_parser_test.c
992
.tv_mode = DRM_MODE_TV_MODE_ ## _opt, \
drivers/gpu/drm/tests/drm_probe_helper_test.c
107
cmdline->tv_mode = params->cmdline_mode;
drivers/gpu/drm/vc4/vc4_vec.c
353
const struct vc4_vec_tv_mode *tv_mode = &vc4_vec_tv_modes[i];
drivers/gpu/drm/vc4/vc4_vec.c
355
if (tv_mode->mode == mode &&
drivers/gpu/drm/vc4/vc4_vec.c
356
tv_mode->expected_htotal == htotal)
drivers/gpu/drm/vc4/vc4_vec.c
357
return tv_mode;
drivers/gpu/drm/vc4/vc4_vec.c
574
const struct vc4_vec_tv_mode *tv_mode;
drivers/gpu/drm/vc4/vc4_vec.c
580
tv_mode = vc4_vec_tv_mode_lookup(conn_state->tv.mode,
drivers/gpu/drm/vc4/vc4_vec.c
582
if (!tv_mode)
drivers/gpu/drm/vc4/vc4_vec.c
640
VEC_WRITE(VEC_CONFIG0, tv_mode->config0);
drivers/gpu/drm/vc4/vc4_vec.c
641
VEC_WRITE(VEC_CONFIG1, tv_mode->config1);
drivers/gpu/drm/vc4/vc4_vec.c
643
if (tv_mode->custom_freq) {
drivers/gpu/drm/vc4/vc4_vec.c
645
(tv_mode->custom_freq >> 16) & 0xffff);
drivers/gpu/drm/vc4/vc4_vec.c
647
tv_mode->custom_freq & 0xffff);
drivers/gpu/drm/vc4/vc4_vec.c
668
const struct vc4_vec_tv_mode *tv_mode;
drivers/gpu/drm/vc4/vc4_vec.c
670
tv_mode = vc4_vec_tv_mode_lookup(conn_state->tv.mode, mode->htotal);
drivers/gpu/drm/vc4/vc4_vec.c
671
if (!tv_mode)
include/drm/drm_connector.h
1853
enum drm_connector_tv_mode tv_mode;