Symbol: update_plane_addr
drivers/gpu/drm/amd/display/dc/core/dc.c
4041
dc->hwss.update_plane_addr(dc, pipe_ctx);
drivers/gpu/drm/amd/display/dc/core/dc.c
4509
dc->hwss.update_plane_addr(dc, pipe_ctx);
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
810
if (dc->hwss.update_plane_addr && current_mpc_pipe->plane_state->update_flags.bits.addr_update) {
drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
973
dc->hwss.update_plane_addr(params->update_plane_addr_params.dc,
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
3050
dc->hwss.update_plane_addr(dc, pipe_ctx);
drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
3374
.update_plane_addr = update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c
411
dc->hwss.update_plane_addr(dc, pipe_ctx);
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
3136
dc->hwss.update_plane_addr(dc, pipe_ctx);
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_init.c
40
.update_plane_addr = dcn10_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
1855
dc->hwss.update_plane_addr(dc, pipe_ctx);
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c
42
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_init.c
42
.update_plane_addr = dcn201_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_init.c
43
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_init.c
43
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_init.c
45
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c
46
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c
48
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c
45
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
50
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
49
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
25
.update_plane_addr = dcn20_update_plane_addr,
drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
1020
void (*update_plane_addr)(const struct dc *dc,