uic
raw_spin_lock_irqsave(&uic->lock, flags);
er = mfdcr(uic->dcrbase + UIC_ER);
mtdcr(uic->dcrbase + UIC_ER, er);
mtdcr(uic->dcrbase + UIC_SR, sr);
raw_spin_unlock_irqrestore(&uic->lock, flags);
struct uic *uic = irq_data_get_irq_chip_data(d);
raw_spin_lock_irqsave(&uic->lock, flags);
tr = mfdcr(uic->dcrbase + UIC_TR);
pr = mfdcr(uic->dcrbase + UIC_PR);
mtdcr(uic->dcrbase + UIC_PR, pr);
mtdcr(uic->dcrbase + UIC_TR, tr);
mtdcr(uic->dcrbase + UIC_SR, ~mask);
raw_spin_unlock_irqrestore(&uic->lock, flags);
struct uic *uic = h->host_data;
irq_set_chip_data(virq, uic);
struct uic *uic = irq_desc_get_handler_data(desc);
msr = mfdcr(uic->dcrbase + UIC_MSR);
generic_handle_domain_irq(uic->irqhost, src);
static struct uic * __init uic_init_one(struct device_node *node)
struct uic *uic;
uic = kzalloc_obj(*uic);
if (! uic)
raw_spin_lock_init(&uic->lock);
uic->index = *indexp;
uic->dcrbase = *dcrreg;
uic->irqhost = irq_domain_create_linear(of_fwnode_handle(node),
uic);
if (! uic->irqhost)
mtdcr(uic->dcrbase + UIC_ER, 0);
mtdcr(uic->dcrbase + UIC_CR, 0);
mtdcr(uic->dcrbase + UIC_TR, 0);
mtdcr(uic->dcrbase + UIC_SR, 0xffffffff);
printk ("UIC%d (%d IRQ sources) at DCR 0x%x\n", uic->index,
NR_UIC_INTS, uic->dcrbase);
return uic;
struct uic *uic;
uic = uic_init_one(np);
if (! uic)
irq_set_handler_data(cascade_virq, uic);
static struct uic *primary_uic;
struct uic *uic = irq_data_get_irq_chip_data(d);
raw_spin_lock_irqsave(&uic->lock, flags);
mtdcr(uic->dcrbase + UIC_SR, sr);
er = mfdcr(uic->dcrbase + UIC_ER);
mtdcr(uic->dcrbase + UIC_ER, er);
raw_spin_unlock_irqrestore(&uic->lock, flags);
struct uic *uic = irq_data_get_irq_chip_data(d);
raw_spin_lock_irqsave(&uic->lock, flags);
er = mfdcr(uic->dcrbase + UIC_ER);
mtdcr(uic->dcrbase + UIC_ER, er);
raw_spin_unlock_irqrestore(&uic->lock, flags);
struct uic *uic = irq_data_get_irq_chip_data(d);
raw_spin_lock_irqsave(&uic->lock, flags);
mtdcr(uic->dcrbase + UIC_SR, 1 << (31-src));
raw_spin_unlock_irqrestore(&uic->lock, flags);
struct uic *uic = irq_data_get_irq_chip_data(d);