arch/mips/include/asm/uasm.h

222

# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh)

arch/mips/mm/tlbex.c

1075

uasm_i_dsrl_safe(p, scratch, tmp,

arch/mips/mm/tlbex.c

1120

uasm_i_dsrl_safe(p, scratch, tmp, PGDIR_SHIFT - 3);

arch/mips/mm/tlbex.c

1132

uasm_i_dsrl_safe(p, scratch, tmp, PGDIR_SHIFT - 3);

arch/mips/mm/tlbex.c

1148

uasm_i_dsrl_safe(p, scratch, tmp, PUD_SHIFT - 3);

arch/mips/mm/tlbex.c

1163

uasm_i_dsrl_safe(p, scratch, tmp, PMD_SHIFT - 3);

arch/mips/mm/tlbex.c

1208

uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_GLOBAL));

arch/mips/mm/tlbex.c

1210

uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_GLOBAL));

arch/mips/mm/tlbex.c

1277

uasm_i_dsrl_safe(&p, GPR_K1, GPR_K0, 62);

arch/mips/mm/tlbex.c

1278

uasm_i_dsrl_safe(&p, GPR_K0, GPR_K0, 12 + 1);

arch/mips/mm/tlbex.c

1485

uasm_i_dsrl_safe(&p, GPR_K1, GPR_K0,

arch/mips/mm/tlbex.c

2071

uasm_i_dsrl_safe(&p, GPR_K1, GPR_K0, 62);

arch/mips/mm/tlbex.c

2072

uasm_i_dsrl_safe(&p, GPR_K0, GPR_K0, 12 + 1);

arch/mips/mm/tlbex.c

601

uasm_i_dsrl_safe(p, reg, reg, ilog2(_PAGE_GLOBAL));

arch/mips/mm/tlbex.c

783

uasm_i_dsrl_safe(p, ptr, tmp, PGDIR_SHIFT + PGD_TABLE_ORDER + PAGE_SHIFT - 3);

arch/mips/mm/tlbex.c

811

uasm_i_dsrl_safe(p, ptr, ptr, SMP_CPUID_PTRSHIFT);

arch/mips/mm/tlbex.c

825

uasm_i_dsrl_safe(p, tmp, tmp, PGDIR_SHIFT - 3);

arch/mips/mm/tlbex.c

832

uasm_i_dsrl_safe(p, tmp, tmp, PUD_SHIFT - 3); /* get pud offset in bytes */

arch/mips/mm/tlbex.c

839

uasm_i_dsrl_safe(p, tmp, tmp, PMD_SHIFT-3); /* get pmd offset in bytes */