drivers/gpu/drm/amd/display/dc/core/dc.c

1345

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/core/dc.c

1798

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/core/dc.c

2170

struct timing_generator *tg = NULL;

drivers/gpu/drm/amd/display/dc/core/dc.c

650

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/core/dc.c

723

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/core/dc.c

7258

struct timing_generator *tg = NULL;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1982

struct timing_generator *tg, int opp_inst[MAX_PIPES], int opp_head_count,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2000

struct timing_generator *tg, struct dc_crtc_timing *timing)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2023

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2046

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2061

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2078

struct timing_generator *tg, uint32_t start_line, uint32_t end_line)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2093

struct timing_generator *tg, int start_line)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2261

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2291

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2496

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2598

struct timing_generator *tg = params->set_odm_combine_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2611

struct timing_generator *tg = params->set_odm_bypass_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2668

struct timing_generator *tg = params->tg_set_dsc_config_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2751

struct timing_generator *tg = params->tg_program_global_sync_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2766

struct timing_generator *tg = params->tg_wait_for_state_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2775

struct timing_generator *tg = params->tg_set_vtg_params_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2809

struct timing_generator *tg = params->tg_setup_vertical_interrupt0_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2819

struct timing_generator *tg = params->tg_setup_vertical_interrupt2_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

297

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2986

struct timing_generator *tg = params->tg_enable_crtc_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2994

struct timing_generator *tg = params->tg_set_gsl_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3003

struct timing_generator *tg = params->tg_set_gsl_source_select_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3025

struct timing_generator *tg = params->tg_wait_double_buffer_pending_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3067

struct timing_generator *tg = params->tg_get_frame_count_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3251

struct timing_generator *tg = params->disable_phantom_crtc_params.tg;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

3921

struct timing_generator *tg, struct dsc_optc_config *dsc_optc_cfg, bool enable)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4209

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4221

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4325

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

4805

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5474

struct timing_generator *tg = dc->res_pool->timing_generators[0];

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

769

struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

837

struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

107

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1115

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1174

void dce110_timing_generator_wait_for_vblank(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1198

void dce110_timing_generator_wait_for_vactive(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1220

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

124

bool dce110_timing_generator_enable_crtc(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1318

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1397

bool dce110_timing_generator_is_counter_moving(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1412

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1474

void dce110_timing_generator_set_lock_master(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1492

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

153

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1582

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1714

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1778

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1801

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1849

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1896

void dce110_tg_program_blank_color(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

190

static void disable_stereo(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1925

void dce110_tg_set_overscan_color(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1955

void dce110_tg_program_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1977

bool dce110_tg_is_blanked(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

1994

void dce110_tg_set_blank(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2022

bool dce110_tg_validate_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2045

void dce110_tg_wait_for_state(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2062

void dce110_tg_set_colors(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2075

bool dce110_arm_vert_intr(struct timing_generator *tg, uint8_t width)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2111

static bool dce110_is_tg_enabled(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2125

bool dce110_configure_crc(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

2263

bool dce110_get_crc(struct timing_generator *tg, uint8_t idx,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

233

bool dce110_timing_generator_disable_crtc(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

256

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

282

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

367

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

471

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

513

uint32_t dce110_timing_generator_get_vblank_counter(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

534

void dce110_timing_generator_get_position(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

571

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

602

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

66

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

705

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c

93

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

128

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

136

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

140

bool dce110_timing_generator_enable_crtc(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

141

bool dce110_timing_generator_disable_crtc(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

144

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

151

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

154

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

158

bool dce110_timing_generator_is_counter_moving(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

161

void dce110_timing_generator_wait_for_vblank(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

164

void dce110_timing_generator_wait_for_vactive(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

170

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

175

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

179

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

185

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

190

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

194

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

198

void dce110_timing_generator_disable_vga(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

202

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

208

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

212

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

221

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

229

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

233

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

238

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

245

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

249

void dce110_timing_generator_set_lock_master(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

252

void dce110_tg_program_blank_color(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

255

void dce110_tg_set_overscan_color(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

258

void dce110_tg_program_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

268

bool dce110_tg_is_blanked(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

270

void dce110_tg_set_blank(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

273

bool dce110_tg_validate_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

276

void dce110_tg_wait_for_state(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

279

void dce110_tg_set_colors(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

284

struct timing_generator *tg, uint8_t width);

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

286

bool dce110_configure_crc(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

289

bool dce110_get_crc(struct timing_generator *tg, uint8_t idx,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

97

struct timing_generator base;

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

119

static void dce110_timing_generator_v_unblank_crtc(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

140

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

152

static bool dce110_timing_generator_v_is_counter_moving(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

190

static void dce110_timing_generator_v_wait_for_vblank(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

214

static void dce110_timing_generator_v_wait_for_vactive(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

224

static void dce110_timing_generator_v_wait_for_state(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

242

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

384

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

426

static void dce110_timing_generator_v_set_blank(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

435

static void dce110_timing_generator_v_program_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

458

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

484

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

529

static void dce110_tg_v_program_blank_color(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

53

static bool dce110_timing_generator_v_enable_crtc(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

557

static void dce110_timing_generator_v_set_overscan_color(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

586

static void dce110_timing_generator_v_set_colors(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

597

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

609

static uint32_t dce110_timing_generator_v_get_vblank_counter(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

620

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

627

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

636

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

645

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

652

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

659

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

80

static bool dce110_timing_generator_v_disable_crtc(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

99

static void dce110_timing_generator_v_blank_crtc(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

102

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1063

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1088

static bool dce120_is_tg_enabled(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1101

static bool dce120_configure_crc(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

1181

static bool dce120_get_crc(struct timing_generator *tg, uint8_t idx,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

128

static bool dce120_tg_validate_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

136

static bool dce120_timing_generator_enable_crtc(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

157

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

170

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

185

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

210

static void dce120_timing_generator_wait_for_vblank(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

232

static void dce120_timing_generator_wait_for_vactive(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

246

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

283

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

304

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

352

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

372

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

388

static void dce120_timing_generator_disable_vga(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

430

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

490

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

503

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

545

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

594

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

623

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

660

static void dce120_tg_program_blank_color(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

683

static void dce120_tg_set_overscan_color(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

695

static void dce120_tg_program_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

717

static bool dce120_tg_is_blanked(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

738

static void dce120_tg_set_blank(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

754

bool dce120_tg_validate_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

757

static void dce120_tg_wait_for_state(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

774

static void dce120_tg_set_colors(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

786

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

802

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c

86

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

108

static void program_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

125

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

179

static bool dce60_is_tg_enabled(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

193

static bool dce60_configure_crc(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce60/dce60_timing_generator.c

87

static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz)

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

108

static void dce80_timing_generator_program_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

131

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c

87

static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz)

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

428

struct timing_generator *tg = pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c

497

struct timing_generator *tg = pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1208

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1894

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1957

struct timing_generator *tg = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2003

struct timing_generator *tg = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2280

struct timing_generator *tg = pipe_ctx[i]->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2872

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3038

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

731

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1171

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

124

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1631

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1686

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1776

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

197

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

229

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2314

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2526

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2593

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3307

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3347

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3484

struct timing_generator *tg = pipe_ctx[i]->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3657

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3680

struct timing_generator *wa_tg = dc->res_pool->timing_generators[0];

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4054

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4065

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

638

struct timing_generator *tg = pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

861

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2100

struct timing_generator *tg = dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2295

struct timing_generator *tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2363

struct timing_generator *tg = dc->res_pool->timing_generators[0];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2546

struct timing_generator *optc;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2814

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3043

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3183

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3190

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3214

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3245

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3261

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

394

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

741

struct timing_generator *tg = is_phantom ? pipe_ctx->stream_res.tg : NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

885

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

95

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

169

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

276

struct timing_generator *tg = res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

284

struct timing_generator *tg = res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

308

struct timing_generator *tg = res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

337

struct timing_generator *tg = res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

353

struct timing_generator *tg = res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.h

45

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

214

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c

248

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1263

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1289

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

1307

struct timing_generator *optc = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

116

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

199

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c

726

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1659

struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1853

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

120

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1030

struct timing_generator *tg = dc->res_pool->timing_generators[ui];

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1472

struct timing_generator *tg = pipe_ctx[i]->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

231

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

656

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

711

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

801

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

917

struct timing_generator *tg = is_phantom ? pipe_ctx->stream_res.tg : NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1000

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1934

struct timing_generator *tg = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2140

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2569

struct timing_generator *tg = dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2727

struct timing_generator *tg = pipe->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2796

struct timing_generator *tg = dc->res_pool->timing_generators[0];

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3537

struct timing_generator *tg = is_phantom ? pipe_ctx->stream_res.tg : NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

4008

struct timing_generator *tg = pipe_ctx->stream_res.tg;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1047

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

121

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

211

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/dcn42b/dcn42b_hwseq.c

62

struct timing_generator *tg = dc->res_pool->timing_generators[i];

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

106

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1472

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1535

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1556

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1977

struct timing_generator *tg, int opp_inst[MAX_PIPES], int opp_head_count,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1981

struct timing_generator *optc, struct dc_crtc_timing *timing);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1984

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1992

struct timing_generator *tg, enum crtc_state state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1995

struct timing_generator *tg, struct dc_crtc_timing *dc_crtc_timing, bool program_fp2);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1998

struct timing_generator *tg, uint32_t start_line, uint32_t end_line);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2001

struct timing_generator *tg, int start_line);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2033

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2039

struct timing_generator *tg, unsigned int timeout_us, unsigned int polling_interval_us);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2129

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2133

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2169

struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

225

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

233

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2356

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

2360

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

266

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

298

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

307

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

312

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

318

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

323

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

334

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

468

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

478

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

499

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

602

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

122

void (*init_blank)(struct dc *dc, struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

70

struct timing_generator;

drivers/gpu/drm/amd/display/dc/inc/core_types.h

255

struct timing_generator *timing_generators[MAX_PIPES];

drivers/gpu/drm/amd/display/dc/inc/core_types.h

359

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

100

void optc1_program_global_sync(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

107

bool optc1_disable_crtc(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

109

bool optc1_is_counter_moving(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

111

void optc1_get_position(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

114

uint32_t optc1_get_vblank_counter(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

116

void optc1_get_crtc_scanoutpos(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

122

void optc1_set_early_control(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

125

void optc1_wait_for_state(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

128

void optc1_set_blank(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

131

bool optc1_is_blanked(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

133

void optc1_program_blank_color(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

136

bool optc1_did_triggered_reset_occur(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

138

void optc1_enable_reset_trigger(struct timing_generator *optc, int source_tg_inst);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

140

void optc1_disable_reset_trigger(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

142

void optc1_lock(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

144

void optc1_unlock(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

146

void optc1_enable_optc_clock(struct timing_generator *optc, bool enable);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

148

void optc1_set_drr(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

151

void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

153

void optc1_set_static_screen_control(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

157

void optc1_program_stereo(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

161

bool optc1_is_stereo_left_eye(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

163

void optc1_clear_optc_underflow(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

165

void optc1_tg_init(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

167

bool optc1_is_tg_enabled(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

169

bool optc1_is_optc_underflow_occurred(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

171

void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enable);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

173

void optc1_set_timing_double_buffer(struct timing_generator *optc, bool enable);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

175

bool optc1_get_otg_active_size(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

179

void optc1_enable_crtc_reset(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

183

bool optc1_configure_crc(struct timing_generator *optc, const struct crc_params *params);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

185

bool optc1_get_crc(struct timing_generator *optc, uint8_t idx,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

190

void optc1_set_vtg_params(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

46

struct timing_generator base;

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

73

void optc1_read_otg_state(struct timing_generator *optc, struct dcn_otg_state *s);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

75

bool optc1_get_hw_timing(struct timing_generator *tg, struct dc_crtc_timing *hw_crtc_timing);

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

77

bool optc1_validate_timing(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

80

void optc1_program_timing(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

90

void optc1_setup_vertical_interrupt0(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

94

void optc1_setup_vertical_interrupt1(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/optc.h

97

void optc1_setup_vertical_interrupt2(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

336

bool (*validate_timing)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

338

void (*program_timing)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

349

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

353

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

356

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

359

bool (*enable_crtc)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

360

bool (*disable_crtc)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

361

void (*phantom_crtc_post_enable)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

362

void (*disable_phantom_crtc)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

363

bool (*immediate_disable_crtc)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

364

bool (*is_counter_moving)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

365

void (*get_position)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

368

uint32_t (*get_frame_count)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

370

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

375

bool (*get_otg_active_size)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

378

bool (*is_matching_timing)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

380

void (*set_early_control)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

382

void (*wait_for_state)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

384

void (*set_blank)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

386

bool (*is_blanked)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

387

void (*set_overscan_blank_color) (struct timing_generator *tg, const struct tg_color *color);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

388

void (*set_blank_color)(struct timing_generator *tg, const struct tg_color *color);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

389

void (*set_colors)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

393

void (*disable_vga)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

394

bool (*did_triggered_reset_occur)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

395

void (*setup_global_swap_lock)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

397

void (*unlock)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

398

void (*lock)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

399

void (*lock_doublebuffer_disable)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

400

void (*lock_doublebuffer_enable)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

401

void(*triplebuffer_unlock)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

402

void(*triplebuffer_lock)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

403

void (*enable_reset_trigger)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

405

void (*enable_crtc_reset)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

408

void (*disable_reset_trigger)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

409

void (*tear_down_global_swap_lock)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

410

void (*enable_advanced_request)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

412

void (*set_drr)(struct timing_generator *tg, const struct drr_params *params);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

413

void (*set_vtotal_min_max)(struct timing_generator *optc, int vtotal_min, int vtotal_max);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

414

void (*get_last_used_drr_vtotal)(struct timing_generator *optc, uint32_t *refresh_rate);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

415

void (*set_static_screen_control)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

419

struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

423

bool (*arm_vert_intr)(struct timing_generator *tg, uint8_t width);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

425

void (*program_global_sync)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

431

void (*enable_optc_clock)(struct timing_generator *tg, bool enable);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

432

void (*program_stereo)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

434

bool (*is_stereo_left_eye)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

436

void (*set_blank_data_double_buffer)(struct timing_generator *tg, bool enable);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

438

void (*tg_init)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

439

bool (*is_tg_enabled)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

440

bool (*is_optc_underflow_occurred)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

441

void (*clear_optc_underflow)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

443

void (*set_dwb_source)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

446

void (*get_optc_source)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

456

bool (*configure_crc)(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

463

bool (*get_crc)(struct timing_generator *tg, uint8_t idx,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

466

void (*program_manual_trigger)(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

467

void (*setup_manual_trigger)(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

468

bool (*get_hw_timing)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

471

void (*set_vtg_params)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

474

void (*set_dsc_config)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

478

void (*get_dsc_status)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

480

void (*set_odm_bypass)(struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

486

void (*set_odm_combine)(struct timing_generator *optc, int *opp_id, int opp_cnt,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

488

void (*get_odm_combine_segments)(struct timing_generator *tg, int *odm_segments);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

489

void (*set_h_timing_div_manual_mode)(struct timing_generator *optc, bool manual_mode);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

490

void (*set_gsl)(struct timing_generator *optc, const struct gsl_params *params);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

491

void (*set_gsl_source_select)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

494

void (*set_out_mux)(struct timing_generator *tg, enum otg_out_mux_dest dest);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

495

void (*set_drr_trigger_window)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

497

int (*set_fva_factor)(struct timing_generator *optc, struct fva_adj *fva_adj);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

498

int (*get_max_hw_supported_fva_factor)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

501

void (*set_vtotal_change_limit)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

503

void (*align_vblanks)(struct timing_generator *master_optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

504

struct timing_generator *slave_optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

509

bool (*validate_vmin_vmax)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

511

bool (*validate_vtotal_change_limit)(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

514

void (*init_odm)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

515

void (*wait_drr_doublebuffer_pending_clear)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

516

void (*set_long_vtotal)(struct timing_generator *optc, const struct long_vtotal_params *params);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

517

void (*wait_odm_doublebuffer_pending_clear)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

518

void (*wait_otg_disable)(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

519

bool (*get_optc_double_buffer_pending)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

520

bool (*get_otg_double_buffer_pending)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

521

bool (*get_pipe_update_pending)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

522

void (*set_vupdate_keepout)(struct timing_generator *tg, bool enable);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

523

bool (*wait_update_lock_status)(struct timing_generator *tg, bool locked);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

524

void (*read_otg_state)(struct timing_generator *tg, struct dcn_otg_state *s);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

525

void (*optc_read_reg_state)(struct timing_generator *tg, struct dcn_optc_reg_state *optc_reg_state);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

526

void (*enable_otg_pwa)(struct timing_generator *tg, struct otc_pwa_frame_sync *pwa_param);

drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h

527

void (*disable_otg_pwa)(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

215

struct timing_generator *tg;

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

108

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

120

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1233

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1252

static void optc1_enable_stereo(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1285

void optc1_program_stereo(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1295

bool optc1_is_stereo_left_eye(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

130

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1311

bool optc1_get_hw_timing(struct timing_generator *tg,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1335

void optc1_read_otg_state(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1402

bool optc1_get_otg_active_size(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1433

void optc1_clear_optc_underflow(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1440

void optc1_tg_init(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1447

bool optc1_is_tg_enabled(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1458

bool optc1_is_optc_underflow_occurred(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1470

bool optc1_configure_crc(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

1564

bool optc1_get_crc(struct timing_generator *optc, uint8_t idx,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

157

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

346

void optc1_set_vtg_params(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

391

void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enable)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

412

void optc1_set_timing_double_buffer(struct timing_generator *optc, bool enable)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

426

static void optc1_unblank_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

450

static void optc1_blank_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

461

void optc1_set_blank(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

470

bool optc1_is_blanked(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

483

void optc1_enable_optc_clock(struct timing_generator *optc, bool enable)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

524

static bool optc1_enable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

556

bool optc1_disable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

580

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

592

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

64

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

661

uint32_t optc1_get_vblank_counter(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

672

void optc1_lock(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

688

void optc1_unlock(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

698

void optc1_get_position(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

711

bool optc1_is_counter_moving(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

726

struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

740

void optc1_disable_reset_trigger(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

753

void optc1_enable_reset_trigger(struct timing_generator *optc, int source_tg_inst)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

788

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

832

void optc1_wait_for_state(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

856

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

868

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

891

static void optc1_setup_manual_trigger(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

909

static void optc1_program_manual_trigger(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

927

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

95

static void optc1_disable_stereo(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

962

void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)

drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.c

974

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

106

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

132

void optc2_set_dsc_config(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

152

void optc2_get_dsc_status(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

161

void optc2_set_odm_bypass(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

181

void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

221

void optc2_get_optc_source(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

244

static void optc2_set_dwb_source(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

258

struct timing_generator *optc_master,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

259

struct timing_generator *optc_slave,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

381

void optc2_triplebuffer_lock(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

399

void optc2_triplebuffer_unlock(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

411

void optc2_lock_doublebuffer_enable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

438

void optc2_lock_doublebuffer_disable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

454

void optc2_setup_manual_trigger(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

479

void optc2_program_manual_trigger(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

48

bool optc2_enable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

487

bool optc2_configure_crc(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

500

void optc2_get_last_used_drr_vtotal(struct timing_generator *optc, uint32_t *refresh_rate)

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c

86

void optc2_set_gsl(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

101

void optc2_set_dsc_config(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

106

void optc2_get_dsc_status(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

109

void optc2_set_odm_bypass(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

112

void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

115

void optc2_get_optc_source(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

120

void optc2_triplebuffer_lock(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

121

void optc2_triplebuffer_unlock(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

122

void optc2_lock_doublebuffer_disable(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

123

void optc2_lock_doublebuffer_enable(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

124

void optc2_setup_manual_trigger(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

125

void optc2_program_manual_trigger(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

126

bool optc2_configure_crc(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

89

void optc2_get_last_used_drr_vtotal(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

92

bool optc2_enable_crtc(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

94

void optc2_set_gsl(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.h

97

void optc2_set_gsl_source_select(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn201/dcn201_optc.c

119

static void optc201_get_optc_source(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn201/dcn201_optc.c

41

static void optc201_triplebuffer_lock(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn201/dcn201_optc.c

57

static void optc201_triplebuffer_unlock(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn201/dcn201_optc.c

69

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

102

void optc3_lock_doublebuffer_disable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

119

void optc3_lock(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

135

void optc3_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

142

void optc3_program_blank_color(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

158

void optc3_set_drr_trigger_window(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

168

void optc3_set_vtotal_change_limit(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

184

void optc3_set_dsc_config(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

201

void optc3_set_odm_bypass(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

224

void optc3_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

282

bool optc3_get_optc_double_buffer_pending(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

295

bool optc3_get_otg_update_pending(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

308

bool optc3_get_pipe_update_pending(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

334

static void optc3_set_timing_double_buffer(struct timing_generator *optc, bool enable)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

343

void optc3_wait_drr_doublebuffer_pending_clear(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

351

void optc3_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

361

void optc3_tg_init(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

45

void optc3_triplebuffer_lock(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.c

65

void optc3_lock_doublebuffer_enable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

336

void optc3_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

338

void optc3_lock(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

340

void optc3_lock_doublebuffer_enable(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

342

void optc3_lock_doublebuffer_disable(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

344

void optc3_set_drr_trigger_window(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

347

void optc3_triplebuffer_lock(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

349

void optc3_program_blank_color(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

352

void optc3_set_vtotal_change_limit(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

355

void optc3_set_dsc_config(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

360

void optc3_set_timing_db_mode(struct timing_generator *optc, bool enable);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

362

void optc3_set_odm_bypass(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

364

void optc3_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

366

void optc3_wait_drr_doublebuffer_pending_clear(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

367

void optc3_tg_init(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

368

void optc3_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

369

bool optc3_get_optc_double_buffer_pending(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

370

bool optc3_get_otg_update_pending(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn30/dcn30_optc.h

371

bool optc3_get_pipe_update_pending(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.c

53

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.c

97

void optc301_setup_manual_trigger(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.h

33

void optc301_setup_manual_trigger(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.h

34

void optc301_set_drr(struct timing_generator *optc, const struct drr_params *params);

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

122

static bool optc31_disable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

156

bool optc31_immediate_disable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

181

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

229

void optc3_init_odm(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

249

void optc31_read_otg_state(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

319

void optc31_read_reg_state(struct timing_generator *optc, struct dcn_optc_reg_state *optc_reg_state)

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

43

static void optc31_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.c

96

static bool optc31_enable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.h

268

bool optc31_immediate_disable_crtc(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.h

270

void optc31_set_drr(struct timing_generator *optc, const struct drr_params *params);

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.h

272

void optc3_init_odm(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.h

274

void optc31_read_otg_state(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn31/dcn31_optc.h

277

void optc31_read_reg_state(struct timing_generator *optc, struct dcn_optc_reg_state *optc_reg_state);

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

106

static bool optc314_enable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

132

static bool optc314_disable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

153

static void optc314_phantom_crtc_post_enable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

164

static void optc314_set_odm_bypass(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

187

static void optc314_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode)

drivers/gpu/drm/amd/display/dc/optc/dcn314/dcn314_optc.c

50

static void optc314_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

101

void optc32_get_odm_combine_segments(struct timing_generator *tg, int *odm_combine_segments)

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

125

void optc32_wait_odm_doublebuffer_pending_clear(struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

132

void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode)

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

146

static bool optc32_enable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

172

static bool optc32_disable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

203

static void optc32_phantom_crtc_post_enable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

214

static void optc32_disable_phantom_otg(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

228

void optc32_set_odm_bypass(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

251

static void optc32_setup_manual_trigger(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

274

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.c

45

static void optc32_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.h

189

void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode);

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.h

190

void optc32_get_odm_combine_segments(struct timing_generator *tg, int *odm_combine_segments);

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.h

191

void optc32_set_odm_bypass(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn32/dcn32_optc.h

193

void optc32_wait_odm_doublebuffer_pending_clear(struct timing_generator *tg);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

113

static bool optc35_enable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

139

static bool optc35_disable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

173

static void optc35_phantom_crtc_post_enable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

207

static bool optc35_get_crc(struct timing_generator *optc, uint8_t idx,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

274

bool optc35_configure_crc(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

367

static void optc35_setup_manual_trigger(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

397

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

442

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

528

void optc35_wait_otg_disable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

58

static void optc35_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h

100

void optc35_wait_otg_disable(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h

91

void optc35_set_drr(struct timing_generator *optc, const struct drr_params *params);

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h

94

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.h

97

bool optc35_configure_crc(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

104

void optc401_set_odm_combine(struct timing_generator *optc, int *opp_id,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

165

void optc401_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

180

bool optc401_enable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

206

bool optc401_disable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

242

void optc401_phantom_crtc_post_enable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

253

void optc401_disable_phantom_otg(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

267

void optc401_set_odm_bypass(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

291

void optc401_setup_manual_trigger(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

315

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

373

void optc401_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

386

void optc401_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

407

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

440

void optc401_set_vupdate_keepout(struct timing_generator *tg, bool enable)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c

452

bool optc401_wait_update_lock_status(struct timing_generator *tg, bool locked)

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

172

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

174

void optc401_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

175

void optc401_setup_manual_trigger(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

177

struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

183

bool optc401_enable_crtc(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

184

bool optc401_disable_crtc(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

185

void optc401_phantom_crtc_post_enable(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

186

void optc401_disable_phantom_otg(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

187

void optc401_set_odm_bypass(struct timing_generator *optc,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

189

void optc401_set_odm_combine(struct timing_generator *optc, int *opp_id,

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

191

void optc401_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

192

void optc401_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

193

bool optc401_wait_update_lock_status(struct timing_generator *tg, bool locked);

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h

194

void optc401_set_vupdate_keepout(struct timing_generator *tg, bool enable);

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

106

void optc42_disable_pwa(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

113

void optc42_clear_optc_underflow(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

120

bool optc42_is_optc_underflow_occurred(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

135

bool optc42_disable_crtc(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

142

static void optc42_set_timing_double_buffer(struct timing_generator *optc, bool enable)

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

156

void optc42_tg_init(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

162

void optc42_lock_doublebuffer_enable(struct timing_generator *optc)

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

43

static bool optc42_get_crc(struct timing_generator *optc, uint8_t idx,

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

89

void optc42_enable_pwa(struct timing_generator *optc, struct otc_pwa_frame_sync *pwa_sync_param)

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.h

391

void optc42_enable_pwa(struct timing_generator *optc, struct otc_pwa_frame_sync *pwa_sync_param);

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.h

392

void optc42_disable_pwa(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.h

393

void optc42_tg_init(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.h

394

void optc42_clear_optc_underflow(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.h

395

bool optc42_is_optc_underflow_occurred(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.h

396

bool optc42_disable_crtc(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.h

397

void optc42_lock_doublebuffer_enable(struct timing_generator *optc);

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

469

static struct timing_generator *dce100_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

513

static struct timing_generator *dce110_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

494

static struct timing_generator *dce112_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

579

static struct timing_generator *dce120_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

504

static struct timing_generator *dce60_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

510

static struct timing_generator *dce80_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

730

static struct timing_generator *dcn10_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

909

struct timing_generator *dcn20_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

108

struct timing_generator *dcn20_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

786

static struct timing_generator *dcn201_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1075

static struct timing_generator *dcn21_timing_generator_create(struct dc_context *ctx,

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

959

static struct timing_generator *dcn30_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

875

static struct timing_generator *dcn301_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

723

static struct timing_generator *dcn302_timing_generator_create(struct dc_context *ctx, uint32_t instance)

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

695

static struct timing_generator *dcn303_timing_generator_create(struct dc_context *ctx, uint32_t instance)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1126

static struct timing_generator *dcn31_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1183

static struct timing_generator *dcn31_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1125

static struct timing_generator *dcn31_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1118

static struct timing_generator *dcn31_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1068

static struct timing_generator *dcn32_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1056

static struct timing_generator *dcn321_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1096

static struct timing_generator *dcn35_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1076

static struct timing_generator *dcn35_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1083

static struct timing_generator *dcn35_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1058

static struct timing_generator *dcn401_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

1090

static struct timing_generator *dcn42_timing_generator_create(

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

1126

static struct timing_generator *dcn42b_timing_generator_create(