drivers/gpu/drm/tilcdc/tilcdc_crtc.c

131

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

133

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

161

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

164

tilcdc_clear(dev, LCDC_DMA_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

184

tilcdc_clear(dev, LCDC_CLK_RESET_REG, LCDC_CLK_MAIN_RESET);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

347

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

383

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_PIXEL_CLOCK);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

389

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

394

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_HSYNC);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

399

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_VSYNC);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

433

tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

475

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

679

tilcdc_clear(dev, LCDC_DMA_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

682

tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

704

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

904

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

918

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

943

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,