drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1001

init_waitqueue_head(&tilcdc_crtc->frame_done_wq);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1003

spin_lock_init(&tilcdc_crtc->irq_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

1004

INIT_WORK(&tilcdc_crtc->recover_work, tilcdc_crtc_recover_work);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

101

reinit_completion(&tilcdc_crtc->palette_loaded);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

105

tilcdc_crtc->palette_dma_handle);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

107

(u32) tilcdc_crtc->palette_dma_handle +

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

125

ret = wait_for_completion_timeout(&tilcdc_crtc->palette_loaded,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

203

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

249

tilcdc_crtc->lcd_fck_rate = clk_rate;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

252

tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

272

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

409

tilcdc_crtc->hvtotal_us =

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

416

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

419

mutex_lock(&tilcdc_crtc->enable_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

420

if (tilcdc_crtc->enabled || tilcdc_crtc->shutdown) {

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

421

mutex_unlock(&tilcdc_crtc->enable_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

444

spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

445

tilcdc_crtc->last_vblank = ktime_get();

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

447

spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

451

tilcdc_crtc->enabled = true;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

452

mutex_unlock(&tilcdc_crtc->enable_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

463

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

467

mutex_lock(&tilcdc_crtc->enable_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

469

tilcdc_crtc->shutdown = true;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

470

if (!tilcdc_crtc->enabled) {

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

471

mutex_unlock(&tilcdc_crtc->enable_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

474

tilcdc_crtc->frame_done = false;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

481

ret = wait_event_timeout(tilcdc_crtc->frame_done_wq,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

482

tilcdc_crtc->frame_done,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

503

tilcdc_crtc->enabled = false;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

504

mutex_unlock(&tilcdc_crtc->enable_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

542

struct tilcdc_crtc *tilcdc_crtc =

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

543

container_of(work, struct tilcdc_crtc, recover_work);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

544

struct drm_crtc *crtc = &tilcdc_crtc->base;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

574

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

577

if (tilcdc_crtc->event) {

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

58

#define to_tilcdc_crtc(x) container_of(x, struct tilcdc_crtc, base)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

582

tilcdc_crtc->event = event;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

584

mutex_lock(&tilcdc_crtc->enable_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

586

if (tilcdc_crtc->enabled) {

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

591

spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

593

next_vblank = ktime_add_us(tilcdc_crtc->last_vblank,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

594

tilcdc_crtc->hvtotal_us);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

598

tilcdc_crtc->next_fb = fb;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

602

spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

605

mutex_unlock(&tilcdc_crtc->enable_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

648

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

653

spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

664

spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

671

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

676

spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

685

spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

690

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

703

tilcdc_crtc->frame_done = false;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

706

ret = wait_event_timeout(tilcdc_crtc->frame_done_wq,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

707

tilcdc_crtc->frame_done,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

829

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

832

if (tilcdc_crtc->lcd_fck_rate != clk_get_rate(priv->clk)) {

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

850

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

864

spin_lock(&tilcdc_crtc->irq_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

866

tilcdc_crtc->last_vblank = now;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

868

if (tilcdc_crtc->next_fb) {

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

869

set_scanout(crtc, tilcdc_crtc->next_fb);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

870

tilcdc_crtc->next_fb = NULL;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

874

spin_unlock(&tilcdc_crtc->irq_lock);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

883

event = tilcdc_crtc->event;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

884

tilcdc_crtc->event = NULL;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

891

if (tilcdc_crtc->frame_intact)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

892

tilcdc_crtc->sync_lost_count = 0;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

894

tilcdc_crtc->frame_intact = true;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

902

complete(&tilcdc_crtc->palette_loaded);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

914

tilcdc_crtc->frame_intact = false;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

924

if (tilcdc_crtc->sync_lost_count++ >

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

930

&tilcdc_crtc->recover_work);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

933

tilcdc_crtc->sync_lost_count = 0;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

939

tilcdc_crtc->frame_done = true;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

940

wake_up(&tilcdc_crtc->frame_done_wq);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

96

struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

961

struct tilcdc_crtc *tilcdc_crtc;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

972

tilcdc_crtc = drmm_crtc_alloc_with_planes(dev, struct tilcdc_crtc, base,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

977

if (IS_ERR(tilcdc_crtc)) {

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

978

drm_err(dev, "Failed to init CRTC: %pe\n", tilcdc_crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

979

return PTR_ERR(tilcdc_crtc);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

982

tilcdc_crtc->primary = primary;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

983

priv->crtc = &tilcdc_crtc->base;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

988

init_completion(&tilcdc_crtc->palette_loaded);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

989

tilcdc_crtc->palette_base = dmam_alloc_coherent(dev->dev,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

991

&tilcdc_crtc->palette_dma_handle,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

993

if (!tilcdc_crtc->palette_base)

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

995

*tilcdc_crtc->palette_base = TILCDC_PALETTE_FIRST_ENTRY;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

997

crtc = &tilcdc_crtc->base;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

999

mutex_init(&tilcdc_crtc->enable_lock);