tx_timeout
const struct xdna_mailbox_msg *msg, u64 tx_timeout)
const struct xdna_mailbox_msg *msg, u64 tx_timeout);
rn->tx_timeout = hfi1_ipoib_tx_timeout;
priv->cmq.tx_timeout = HNS_ROCE_CMQ_TX_TIMEOUT;
static u32 hns_roce_cmdq_tx_timeout(u16 opcode, u32 tx_timeout)
return cmdq_tx_timeout[i].tx_timeout;
return tx_timeout;
static void hns_roce_wait_csq_done(struct hns_roce_dev *hr_dev, u32 tx_timeout)
} while (++timeout < tx_timeout);
int num, u32 tx_timeout)
hns_roce_wait_csq_done(hr_dev, tx_timeout);
u32 tx_timeout = hns_roce_cmdq_tx_timeout(opcode, priv->cmq.tx_timeout);
ret = __hns_roce_cmq_send_one(hr_dev, desc, num, tx_timeout);
u16 tx_timeout;
u32 tx_timeout;
if (rn->tx_timeout) {
rn->tx_timeout(dev, txqueue);
static void tx_timeout(struct net_device *dev, unsigned int txqueue);
.ndo_tx_timeout = tx_timeout,
ENA_STAT_GLOBAL_ENTRY(tx_timeout),
ena_increase_stat(&adapter->dev_stats.tx_timeout, 1, &adapter->syncp);
u64 tx_timeout;
coal_conf->tx_timeout = 0x0;
coal_conf->tx_timeout = 0;
coal_conf->tx_timeout = 1;
coal_conf->tx_timeout = 2;
coal_conf->tx_timeout = 4;
timeout = coal_conf->tx_timeout;
unsigned int tx_timeout;
unsigned long tx_timeout;
tx_timeout = jiffies + (XGBE_DMA_STOP_TIMEOUT * HZ);
while (time_before(jiffies, tx_timeout)) {
if (!time_before(jiffies, tx_timeout))
unsigned long tx_timeout;
tx_timeout = jiffies + (XGBE_DMA_STOP_TIMEOUT * HZ);
while (time_before(jiffies, tx_timeout)) {
if (!time_before(jiffies, tx_timeout))
timer_setup(&bp->tx_timeout, bmac_tx_timeout, 0);
struct bmac_data *bp = timer_container_of(bp, t, tx_timeout);
timer_delete(&bp->tx_timeout);
timer_delete(&bp->tx_timeout);
bp->tx_timeout.expires = jiffies + TX_TIMEOUT;
add_timer(&bp->tx_timeout);
struct timer_list tx_timeout;
timer_setup(&mp->tx_timeout, mace_tx_timeout, 0);
timer_delete(&mp->tx_timeout);
mp->tx_timeout.expires = jiffies + TX_TIMEOUT;
add_timer(&mp->tx_timeout);
struct timer_list tx_timeout;
timer_delete(&mp->tx_timeout);
struct mace_data *mp = timer_container_of(mp, t, tx_timeout);
u64 tx_timeout;
NICVF_DRV_STAT(tx_timeout),
this_cpu_inc(nic->drv_stats->tx_timeout);
static void tx_timeout(struct net_device *dev, unsigned int txqueue);
.ndo_tx_timeout = tx_timeout,
static void tx_timeout(struct net_device *dev, unsigned int txqueue);
.ndo_tx_timeout = tx_timeout,
u16 tx_timeout)
net_dev->watchdog_timeo = msecs_to_jiffies(tx_timeout);
err = dpaa_netdev_init(net_dev, &dpaa_ops, tx_timeout);
static u16 tx_timeout = 1000;
module_param(tx_timeout, ushort, 0444);
MODULE_PARM_DESC(tx_timeout, "The Tx timeout in ms");
atomic64_t tx_timeout;
static u32 hclge_get_cmdq_tx_timeout(u16 opcode, u32 tx_timeout)
return cmdq_tx_timeout_map[i].tx_timeout;
return tx_timeout;
hw->cmq.tx_timeout);
cmdq->tx_timeout = HCLGE_COMM_CMDQ_TX_TIMEOUT_DEFAULT;
u32 tx_timeout;
u16 tx_timeout;
seq_printf(s, "tx timeout count: %lu\n", ptp->tx_timeout);
unsigned long tx_timeout;
priv->port_stats.tx_timeout++;
unsigned long tx_timeout;
unsigned long tx_timeout;
tx_timeout = jiffies + (XLGMAC_DMA_STOP_TIMEOUT * HZ);
while (time_before(jiffies, tx_timeout)) {
if (!time_before(jiffies, tx_timeout))
mse->stats.tx_timeout++;
u64 tx_timeout;
htt_stats_buf->tx_timeout);
u32 tx_timeout;
le32_to_cpu(htt_stats_buf->tx_timeout));
__le32 tx_timeout;
if (!vring->tx_timeout) {
vring->tx_timeout = jiffies +
} else if (time_before(jiffies, vring->tx_timeout)) {
vring->tx_timeout = 0;
unsigned long tx_timeout;
timer_setup(&info->tx_timer, tx_timeout, 0);
static void tx_timeout(struct timer_list *t);
void (*tx_timeout)(struct net_device *dev, unsigned int txqueue);
= __ATTR_RO(tx_timeout);