drivers/gpu/drm/i915/display/intel_vrr.c

1014

u32 trans_vrr_ctl, trans_vrr_vsync;

drivers/gpu/drm/i915/display/intel_vrr.c

1017

trans_vrr_ctl = intel_de_read(display,

drivers/gpu/drm/i915/display/intel_vrr.c

1021

crtc_state->cmrr.enable = (trans_vrr_ctl & VRR_CTL_CMRR_ENABLE);

drivers/gpu/drm/i915/display/intel_vrr.c

1034

REG_FIELD_GET(XELPD_VRR_CTL_VRR_GUARDBAND_MASK, trans_vrr_ctl);

drivers/gpu/drm/i915/display/intel_vrr.c

1036

if (trans_vrr_ctl & VRR_CTL_PIPELINE_FULL_OVERRIDE) {

drivers/gpu/drm/i915/display/intel_vrr.c

1038

REG_FIELD_GET(VRR_CTL_PIPELINE_FULL_MASK, trans_vrr_ctl);

drivers/gpu/drm/i915/display/intel_vrr.c

1046

if (trans_vrr_ctl & VRR_CTL_FLIP_LINE_EN) {

drivers/gpu/drm/i915/display/intel_vrr.c

1084

vrr_enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE;

drivers/gpu/drm/i915/display/intel_vrr.c

642

trans_vrr_ctl(crtc_state));

drivers/gpu/drm/i915/display/intel_vrr.c

893

vrr_ctl = VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state);

drivers/gpu/drm/i915/display/intel_vrr.c

912

trans_vrr_ctl(old_crtc_state));