block/blk-rq-qos.c

74

if (rqos->ops->track)

block/blk-rq-qos.c

75

rqos->ops->track(rqos, rq, bio);

block/blk-rq-qos.h

39

void (*track)(struct rq_qos *, struct request *, struct bio *);

block/blk-wbt.c

933

.track = wbt_track,

drivers/acpi/osl.c

258

map->track.refcount++;

drivers/acpi/osl.c

343

map->track.refcount++;

drivers/acpi/osl.c

366

map->track.refcount = 1;

drivers/acpi/osl.c

386

track.rwork);

drivers/acpi/osl.c

395

if (--map->track.refcount)

drivers/acpi/osl.c

400

INIT_RCU_WORK(&map->track.rwork, acpi_os_map_remove);

drivers/acpi/osl.c

401

queue_rcu_work(system_percpu_wq, &map->track.rwork);

drivers/acpi/osl.c

85

} track;

drivers/ata/libata-core.c

825

u32 sect, head, cyl, track;

drivers/ata/libata-core.c

835

track = (u32)block / dev->sectors;

drivers/ata/libata-core.c

836

cyl = track / dev->heads;

drivers/ata/libata-core.c

837

head = track % dev->heads;

drivers/ata/libata-scsi.c

1473

u32 sect, head, cyl, track;

drivers/ata/libata-scsi.c

1479

track = (u32)block / dev->sectors;

drivers/ata/libata-scsi.c

1480

cyl = track / dev->heads;

drivers/ata/libata-scsi.c

1481

head = track % dev->heads;

drivers/block/amiflop.c

1109

return dos_crc(&(hdr->track), 0xb2, 0x30, 3); /* precomputed magic */

drivers/block/amiflop.c

1168

unit[drive].track,drive,scnt);

drivers/block/amiflop.c

1180

printk("(%3d,%d,%2d,%d) %x\n", hdr.track, hdr.side,

drivers/block/amiflop.c

1189

if (hdr.track != unit[drive].track/unit[drive].type->heads) {

drivers/block/amiflop.c

1191

hdr.track,

drivers/block/amiflop.c

1192

unit[drive].track/unit[drive].type->heads);

drivers/block/amiflop.c

1196

if (hdr.side != unit[drive].track%unit[drive].type->heads) {

drivers/block/amiflop.c

1199

unit[drive].track%unit[drive].type->heads);

drivers/block/amiflop.c

1214

unit[drive].track, drive, scnt, hdr.sec);

drivers/block/amiflop.c

1224

hdr.track,hdr.side,hdr.sec,hdr.len_desc,scnt);

drivers/block/amiflop.c

1235

"sc=%d, %x %x\n", hdr.track, hdr.side,

drivers/block/amiflop.c

1289

hdr.track=unit[drive].track/unit[drive].type->heads;

drivers/block/amiflop.c

1290

hdr.side=unit[drive].track%unit[drive].type->heads;

drivers/block/amiflop.c

1295

dos_encode_block((ushort *)raw,(unsigned char *) &hdr.track,28);

drivers/block/amiflop.c

1424

static int get_track(int drive, int track)

drivers/block/amiflop.c

1429

if (unit[drive].track == track)

drivers/block/amiflop.c

1443

if (!fd_seek(drive, track))

drivers/block/amiflop.c

1452

unit[drive].track = -1;

drivers/block/amiflop.c

1463

unsigned int cnt, block, track, sector;

drivers/block/amiflop.c

1473

track = block / (floppy->dtype->sects * floppy->type->sect_mult);

drivers/block/amiflop.c

1478

"0x%08lx\n", track, sector, data);

drivers/block/amiflop.c

1481

if (get_track(drive, track) == -1)

drivers/block/amiflop.c

1583

getprm.track=p->type->tracks;

drivers/block/amiflop.c

1644

unit[drive].track = -1;

drivers/block/amiflop.c

1756

p->track = -1;

drivers/block/amiflop.c

1907

unit[i].track = -1;

drivers/block/amiflop.c

193

int track; /* current track (-1 == unknown) */

drivers/block/amiflop.c

407

if (unit[drive].track % 2 != 0)

drivers/block/amiflop.c

554

unit[drive].track = -1;

drivers/block/amiflop.c

559

unit[drive].track = 0;

drivers/block/amiflop.c

567

static int fd_seek(int drive, int track)

drivers/block/amiflop.c

573

printk("seeking drive %d to track %d\n",drive,track);

drivers/block/amiflop.c

577

if (unit[drive].track == track) {

drivers/block/amiflop.c

585

if (unit[drive].track < 0 && !fd_calibrate(drive)) {

drivers/block/amiflop.c

591

cnt = unit[drive].track/2 - track/2;

drivers/block/amiflop.c

594

if (track % 2 != 0)

drivers/block/amiflop.c

601

if (track % 2 != unit[drive].track % 2)

drivers/block/amiflop.c

603

unit[drive].track = track;

drivers/block/amiflop.c

734

if ((ulong)unit[drive].track >= unit[drive].type->precomp2)

drivers/block/amiflop.c

736

else if ((ulong)unit[drive].track >= unit[drive].type->precomp1)

drivers/block/amiflop.c

828

unsigned char track;

drivers/block/amiflop.c

863

hdr.magic, hdr.track, hdr.sect, hdr.ord,

drivers/block/amiflop.c

875

if (hdr.track != unit[drive].track) {

drivers/block/amiflop.c

876

printk(KERN_INFO "MFM_TRACK: %d, %d\n", hdr.track, unit[drive].track);

drivers/block/amiflop.c

886

hdr.magic, hdr.track, hdr.sect, hdr.ord, scnt,

drivers/block/amiflop.c

943

hdr.track = unit[disk].track;

drivers/block/amiflop.c

984

unsigned char track, /* 0-80 */

drivers/block/ataflop.c

1016

track = FDC_READ( FDCREG_TRACK);

drivers/block/ataflop.c

1018

FDC_WRITE( FDCREG_TRACK, track >> SUDT->stretch);

drivers/block/ataflop.c

1151

unsigned int track;

drivers/block/ataflop.c

1157

track = FDC_READ( FDCREG_TRACK);

drivers/block/ataflop.c

1159

FDC_WRITE( FDCREG_TRACK, track << SUDT->stretch);

drivers/block/ataflop.c

1270

unsigned int track;

drivers/block/ataflop.c

1281

track = FDC_READ( FDCREG_TRACK);

drivers/block/ataflop.c

1283

FDC_WRITE(FDCREG_TRACK,track >> SUDT->stretch);

drivers/block/ataflop.c

1384

FDC_WRITE (FDCREG_DATA, SUD.track);

drivers/block/ataflop.c

1622

getprm.track = dtp->blocks/dtp->spt/2;

drivers/block/ataflop.c

163

int track; /* to be formatted */

drivers/block/ataflop.c

1727

if (setprm.track != dtp->blocks/dtp->spt/2 ||

drivers/block/ataflop.c

1797

UD.track = 0;

drivers/block/ataflop.c

2126

unit[i].track = -1;

drivers/block/ataflop.c

295

int track; /* current head position or -1 if

drivers/block/ataflop.c

367

#define IS_BUFFERED(drive,side,track) \

drivers/block/ataflop.c

368

(BufferDrive == (drive) && BufferSide == (side) && BufferTrack == (track))

drivers/block/ataflop.c

538

FDC_WRITE( FDCREG_TRACK, UD.track );

drivers/block/ataflop.c

719

SUD.track = -1;

drivers/block/ataflop.c

775

if (!UDT || desc->track >= UDT->blocks/UDT->spt/2 || desc->head >= 2) {

drivers/block/ataflop.c

794

*p++ = desc->track;

drivers/block/ataflop.c

811

ReqTrack = desc->track;

drivers/block/ataflop.c

867

if (UD.track == -1)

drivers/block/ataflop.c

869

else if (UD.track != ReqTrack << UDT->stretch)

drivers/block/ataflop.c

882

if (SUD.track >= 0) {

drivers/block/ataflop.c

914

SUD.track = 0;

drivers/block/ataflop.c

926

if (SUD.track == ReqTrack << SUDT->stretch) {

drivers/block/ataflop.c

961

SUD.track = -1;

drivers/block/ataflop.c

965

SUD.track = ReqTrack << SUDT->stretch;

drivers/block/ataflop.c

986

unsigned int track;

drivers/block/floppy.c

1463

drive_state[current_drive].track = NEED_2_RECAL;

drivers/block/floppy.c

1547

drive_state[current_drive].track = NEED_2_RECAL;

drivers/block/floppy.c

1552

if (drive_state[current_drive].track >= 0 &&

drivers/block/floppy.c

1553

drive_state[current_drive].track != reply_buffer[ST1] &&

drivers/block/floppy.c

1564

drive_state[current_drive].track = reply_buffer[ST1];

drivers/block/floppy.c

1596

int track;

drivers/block/floppy.c

1615

if (drive_state[current_drive].track <= NEED_1_RECAL) {

drivers/block/floppy.c

1620

(drive_state[current_drive].track <= NO_TRACK || drive_state[current_drive].track == raw_cmd->track)) {

drivers/block/floppy.c

1623

if (raw_cmd->track)

drivers/block/floppy.c

1624

track = raw_cmd->track - 1;

drivers/block/floppy.c

1631

track = 1;

drivers/block/floppy.c

1635

if (raw_cmd->track != drive_state[current_drive].track &&

drivers/block/floppy.c

1637

track = raw_cmd->track;

drivers/block/floppy.c

1647

if (output_byte(current_fdc, track) < 0) {

drivers/block/floppy.c

1660

switch (drive_state[current_drive].track) {

drivers/block/floppy.c

1693

drive_state[current_drive].track = NEED_1_RECAL;

drivers/block/floppy.c

1697

drive_state[current_drive].track = reply_buffer[ST1];

drivers/block/floppy.c

2105

drive_state[current_drive].track = NEED_2_RECAL;

drivers/block/floppy.c

2139

static void setup_format_params(int track)

drivers/block/floppy.c

2147

unsigned char track, head, sect, size;

drivers/block/floppy.c

2151

raw_cmd->track = track;

drivers/block/floppy.c

2177

n = (track_shift * format_req.track + head_shift * format_req.head)

drivers/block/floppy.c

2187

here[count].track = format_req.track;

drivers/block/floppy.c

2214

setup_format_params(format_req.track << STRETCH(_floppy));

drivers/block/floppy.c

2235

_floppy->track > drive_params[current_drive].tracks ||

drivers/block/floppy.c

2236

tmp_format_req->track >= _floppy->track ||

drivers/block/floppy.c

2404

buffer_track = raw_cmd->track;

drivers/block/floppy.c

2570

if (_floppy->track && raw_cmd->cmd[TRACK] >= _floppy->track) {

drivers/block/floppy.c

2605

raw_cmd->track = raw_cmd->cmd[TRACK] << STRETCH(_floppy);

drivers/block/floppy.c

2643

if ((raw_cmd->track == buffer_track) &&

drivers/block/floppy.c

2670

if (buffer_track != raw_cmd->track || /* bad track */

drivers/block/floppy.c

2693

buffer_track = raw_cmd->track;

drivers/block/floppy.c

2896

raw_cmd->track = 0;

drivers/block/floppy.c

3172

drive_state[current_drive].track = NO_TRACK;

drivers/block/floppy.c

3234

g->track <= 0 || g->track > drive_params[drive].tracks >> STRETCH(g) ||

drivers/block/floppy.c

3374

geo->cylinders = g->track;

drivers/block/floppy.c

3611

short track;

drivers/block/floppy.c

3636

unsigned char track[4];

drivers/block/floppy.c

3794

v.track = drive_state[drive].track;

drivers/block/floppy.c

3837

memcpy(v32.track, v.track, 4);

drivers/block/floppy.c

4677

fdc_state[i].track[unit] = 0;

drivers/block/floppy.c

846

(mode || drive_state[drive].track != NEED_1_RECAL))

drivers/block/floppy.c

847

drive_state[drive].track = NEED_2_RECAL;

drivers/block/swim.c

186

int track;

drivers/block/swim.c

32

unsigned char track;

drivers/block/swim.c

426

static inline int swim_track(struct floppy_state *fs, int track)

drivers/block/swim.c

431

ret = swim_seek(base, track - fs->track);

drivers/block/swim.c

434

fs->track = track;

drivers/block/swim.c

437

fs->track = 0;

drivers/block/swim.c

458

int side, int track,

drivers/block/swim.c

467

swim_track(fs, track);

drivers/block/swim.c

487

if ((header.side != side) || (header.track != track) ||

drivers/block/swim.c

500

int side, track, sector;

drivers/block/swim.c

507

track = i / fs->secpercyl;

drivers/block/swim.c

514

ret = swim_read_sector(fs, side, track, sector,

drivers/block/swim.c

605

fs->track = 0;

drivers/block/swim.c

726

geo->cylinders = g->track;

drivers/cdrom/cdrom.c

2771

__u16 track, __u8 type, track_information *ti)

drivers/cdrom/cdrom.c

2780

cgc.cmd[4] = (track & 0xff00) >> 8;

drivers/cdrom/cdrom.c

2781

cgc.cmd[5] = track & 0xff;

drivers/cdrom/gdrom.c

297

static int get_entry_lba(int track)

drivers/cdrom/gdrom.c

299

return (cpu_to_be32(track & 0xffffff00) - GD_SESSION_OFFSET);

drivers/cdrom/gdrom.c

302

static int get_entry_q_ctrl(int track)

drivers/cdrom/gdrom.c

304

return (track & 0x000000f0) >> 4;

drivers/cdrom/gdrom.c

307

static int get_entry_track(int track)

drivers/cdrom/gdrom.c

309

return (track & 0x0000ff00) >> 8;

drivers/cdrom/gdrom.c

315

int fentry, lentry, track, data, err;

drivers/cdrom/gdrom.c

334

track = get_entry_track(gd.toc->last);

drivers/cdrom/gdrom.c

336

data = gd.toc->entry[track - 1];

drivers/cdrom/gdrom.c

339

track--;

drivers/cdrom/gdrom.c

340

} while (track >= fentry);

drivers/cdrom/gdrom.c

342

if ((track > 100) || (track < get_entry_track(gd.toc->first))) {

drivers/gpu/drm/i915/gvt/gtt.c

743

struct intel_vgpu_page_track *track;

drivers/gpu/drm/i915/gvt/gtt.c

745

track = intel_vgpu_find_page_track(vgpu, gfn);

drivers/gpu/drm/i915/gvt/gtt.c

746

if (track && track->handler == ppgtt_write_protection_handler)

drivers/gpu/drm/i915/gvt/gtt.c

747

return track->priv_data;

drivers/gpu/drm/i915/gvt/page_track.c

106

struct intel_vgpu_page_track *track;

drivers/gpu/drm/i915/gvt/page_track.c

109

track = intel_vgpu_find_page_track(vgpu, gfn);

drivers/gpu/drm/i915/gvt/page_track.c

110

if (!track)

drivers/gpu/drm/i915/gvt/page_track.c

113

if (track->tracked)

drivers/gpu/drm/i915/gvt/page_track.c

119

track->tracked = true;

drivers/gpu/drm/i915/gvt/page_track.c

133

struct intel_vgpu_page_track *track;

drivers/gpu/drm/i915/gvt/page_track.c

136

track = intel_vgpu_find_page_track(vgpu, gfn);

drivers/gpu/drm/i915/gvt/page_track.c

137

if (!track)

drivers/gpu/drm/i915/gvt/page_track.c

140

if (!track->tracked)

drivers/gpu/drm/i915/gvt/page_track.c

146

track->tracked = false;

drivers/gpu/drm/i915/gvt/page_track.c

54

struct intel_vgpu_page_track *track;

drivers/gpu/drm/i915/gvt/page_track.c

57

track = intel_vgpu_find_page_track(vgpu, gfn);

drivers/gpu/drm/i915/gvt/page_track.c

58

if (track)

drivers/gpu/drm/i915/gvt/page_track.c

61

track = kzalloc_obj(*track);

drivers/gpu/drm/i915/gvt/page_track.c

62

if (!track)

drivers/gpu/drm/i915/gvt/page_track.c

65

track->handler = handler;

drivers/gpu/drm/i915/gvt/page_track.c

66

track->priv_data = priv;

drivers/gpu/drm/i915/gvt/page_track.c

68

ret = radix_tree_insert(&vgpu->page_track_tree, gfn, track);

drivers/gpu/drm/i915/gvt/page_track.c

70

kfree(track);

drivers/gpu/drm/i915/gvt/page_track.c

86

struct intel_vgpu_page_track *track;

drivers/gpu/drm/i915/gvt/page_track.c

88

track = radix_tree_delete(&vgpu->page_track_tree, gfn);

drivers/gpu/drm/i915/gvt/page_track.c

89

if (track) {

drivers/gpu/drm/i915/gvt/page_track.c

90

if (track->tracked)

drivers/gpu/drm/i915/gvt/page_track.c

92

kfree(track);

drivers/gpu/drm/radeon/evergreen_cs.c

1005

if (G_028040_FORMAT(track->db_z_info) != V_028040_Z_INVALID &&

drivers/gpu/drm/radeon/evergreen_cs.c

1006

G_028800_Z_ENABLE(track->db_depth_control)) {

drivers/gpu/drm/radeon/evergreen_cs.c

1011

track->db_dirty = false;

drivers/gpu/drm/radeon/evergreen_cs.c

1097

struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

1153

track->db_depth_control = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1154

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1171

track->db_z_info = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1180

track->db_z_info &= ~Z_ARRAY_MODE(0xf);

drivers/gpu/drm/radeon/evergreen_cs.c

1182

track->db_z_info |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags));

drivers/gpu/drm/radeon/evergreen_cs.c

1189

ib[idx] |= DB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks));

drivers/gpu/drm/radeon/evergreen_cs.c

119

static void evergreen_cs_track_init(struct evergreen_cs_track *track)

drivers/gpu/drm/radeon/evergreen_cs.c

1196

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1199

track->db_s_info = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1200

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1203

track->db_depth_view = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1204

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1207

track->db_depth_size = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1208

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1211

track->db_depth_slice = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1212

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1221

track->db_z_read_offset = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1223

track->db_z_read_bo = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

1224

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1233

track->db_z_write_offset = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1235

track->db_z_write_bo = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

1236

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

124

track->cb_color_fmask_bo[i] = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

1245

track->db_s_read_offset = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1247

track->db_s_read_bo = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

1248

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

125

track->cb_color_cmask_bo[i] = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

1257

track->db_s_write_offset = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1259

track->db_s_write_bo = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

126

track->cb_color_cmask_slice[i] = 0;

drivers/gpu/drm/radeon/evergreen_cs.c

1260

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1263

track->vgt_strmout_config = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1264

track->streamout_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1267

track->vgt_strmout_buffer_config = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1268

track->streamout_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

127

track->cb_color_fmask_slice[i] = 0;

drivers/gpu/drm/radeon/evergreen_cs.c

1281

track->vgt_strmout_bo_offset[tmp] = radeon_get_ib_value(p, idx) << 8;

drivers/gpu/drm/radeon/evergreen_cs.c

1283

track->vgt_strmout_bo[tmp] = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

1284

track->streamout_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1292

track->vgt_strmout_size[tmp] = radeon_get_ib_value(p, idx) * 4;

drivers/gpu/drm/radeon/evergreen_cs.c

1293

track->streamout_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1305

track->cb_target_mask = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1306

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1309

track->cb_shader_mask = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

131

track->cb_color_bo[i] = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

1310

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1319

track->nsamples = 1 << tmp;

drivers/gpu/drm/radeon/evergreen_cs.c

132

track->cb_color_bo_offset[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1328

track->nsamples = 1 << tmp;

drivers/gpu/drm/radeon/evergreen_cs.c

133

track->cb_color_info[i] = 0;

drivers/gpu/drm/radeon/evergreen_cs.c

1339

track->cb_color_view[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

134

track->cb_color_view[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1340

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1347

track->cb_color_view[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1348

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

135

track->cb_color_pitch[i] = 0;

drivers/gpu/drm/radeon/evergreen_cs.c

1359

track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

136

track->cb_color_slice[i] = 0xfffffff;

drivers/gpu/drm/radeon/evergreen_cs.c

1368

track->cb_color_info[tmp] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags));

drivers/gpu/drm/radeon/evergreen_cs.c

137

track->cb_color_slice_idx[i] = 0;

drivers/gpu/drm/radeon/evergreen_cs.c

1370

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1377

track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1386

track->cb_color_info[tmp] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags));

drivers/gpu/drm/radeon/evergreen_cs.c

1388

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

139

track->cb_target_mask = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1399

track->cb_color_pitch[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

140

track->cb_shader_mask = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1400

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1407

track->cb_color_pitch[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1408

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

141

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1419

track->cb_color_slice[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1420

track->cb_color_slice_idx[tmp] = idx;

drivers/gpu/drm/radeon/evergreen_cs.c

1421

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1428

track->cb_color_slice[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1429

track->cb_color_slice_idx[tmp] = idx;

drivers/gpu/drm/radeon/evergreen_cs.c

143

track->db_depth_slice = 0xffffffff;

drivers/gpu/drm/radeon/evergreen_cs.c

1430

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

144

track->db_depth_view = 0xFFFFC000;

drivers/gpu/drm/radeon/evergreen_cs.c

145

track->db_depth_size = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1453

ib[idx] |= CB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks));

drivers/gpu/drm/radeon/evergreen_cs.c

146

track->db_depth_control = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1461

track->cb_color_attrib[tmp] = ib[idx];

drivers/gpu/drm/radeon/evergreen_cs.c

1462

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

147

track->db_z_info = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

148

track->db_z_read_offset = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1481

ib[idx] |= CB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks));

drivers/gpu/drm/radeon/evergreen_cs.c

1489

track->cb_color_attrib[tmp] = ib[idx];

drivers/gpu/drm/radeon/evergreen_cs.c

149

track->db_z_write_offset = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1490

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

150

track->db_z_read_bo = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

1507

track->cb_color_fmask_bo[tmp] = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

151

track->db_z_write_bo = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

152

track->db_s_info = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1524

track->cb_color_cmask_bo[tmp] = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

153

track->db_s_read_offset = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1535

track->cb_color_fmask_slice[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

154

track->db_s_write_offset = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1546

track->cb_color_cmask_slice[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

155

track->db_s_read_bo = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

156

track->db_s_write_bo = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

1563

track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1565

track->cb_color_bo[tmp] = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

1566

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

157

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1579

track->cb_color_bo_offset[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

158

track->htile_bo = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

1581

track->cb_color_bo[tmp] = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

1582

track->cb_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

159

track->htile_offset = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

1591

track->htile_offset = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

1593

track->htile_bo = reloc->robj;

drivers/gpu/drm/radeon/evergreen_cs.c

1594

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

1598

track->htile_surface = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/evergreen_cs.c

160

track->htile_surface = 0;

drivers/gpu/drm/radeon/evergreen_cs.c

1601

track->db_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

163

track->vgt_strmout_size[i] = 0;

drivers/gpu/drm/radeon/evergreen_cs.c

164

track->vgt_strmout_bo[i] = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

165

track->vgt_strmout_bo_offset[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/evergreen_cs.c

167

track->streamout_dirty = true;

drivers/gpu/drm/radeon/evergreen_cs.c

168

track->sx_misc_kill_all_prims = false;

drivers/gpu/drm/radeon/evergreen_cs.c

1740

track->sx_misc_kill_all_prims = (radeon_get_ib_value(p, idx) & 0x1) != 0;

drivers/gpu/drm/radeon/evergreen_cs.c

1759

struct evergreen_cs_track *track = p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

1767

if (!(track->reg_safe_bm[i] & m))

drivers/gpu/drm/radeon/evergreen_cs.c

1777

struct evergreen_cs_track *track;

drivers/gpu/drm/radeon/evergreen_cs.c

1785

track = (struct evergreen_cs_track *)p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

2024

track->indirect_draw_buffer_size = radeon_bo_size(reloc->robj);

drivers/gpu/drm/radeon/evergreen_cs.c

2046

if (idx_value + size > track->indirect_draw_buffer_size) {

drivers/gpu/drm/radeon/evergreen_cs.c

2048

idx_value, size, track->indirect_draw_buffer_size);

drivers/gpu/drm/radeon/evergreen_cs.c

206

struct evergreen_cs_track *track = p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

209

palign = MAX(64, track->group_size / surf->bpe);

drivers/gpu/drm/radeon/evergreen_cs.c

211

surf->base_align = track->group_size;

drivers/gpu/drm/radeon/evergreen_cs.c

228

struct evergreen_cs_track *track = p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

231

palign = track->group_size / (8 * surf->bpe * surf->nsamples);

drivers/gpu/drm/radeon/evergreen_cs.c

234

surf->base_align = track->group_size;

drivers/gpu/drm/radeon/evergreen_cs.c

2375

TEX_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks));

drivers/gpu/drm/radeon/evergreen_cs.c

241

track->group_size, surf->bpe, surf->nsamples);

drivers/gpu/drm/radeon/evergreen_cs.c

259

struct evergreen_cs_track *track = p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

270

palign = (8 * surf->bankw * track->npipes) * surf->mtilea;

drivers/gpu/drm/radeon/evergreen_cs.c

2766

struct evergreen_cs_track *track;

drivers/gpu/drm/radeon/evergreen_cs.c

2770

if (p->track == NULL) {

drivers/gpu/drm/radeon/evergreen_cs.c

2772

track = kzalloc_obj(*track);

drivers/gpu/drm/radeon/evergreen_cs.c

2773

if (track == NULL)

drivers/gpu/drm/radeon/evergreen_cs.c

2775

evergreen_cs_track_init(track);

drivers/gpu/drm/radeon/evergreen_cs.c

2778

track->reg_safe_bm = cayman_reg_safe_bm;

drivers/gpu/drm/radeon/evergreen_cs.c

2781

track->reg_safe_bm = evergreen_reg_safe_bm;

drivers/gpu/drm/radeon/evergreen_cs.c

2787

track->npipes = 1;

drivers/gpu/drm/radeon/evergreen_cs.c

2791

track->npipes = 2;

drivers/gpu/drm/radeon/evergreen_cs.c

2794

track->npipes = 4;

drivers/gpu/drm/radeon/evergreen_cs.c

2797

track->npipes = 8;

drivers/gpu/drm/radeon/evergreen_cs.c

2803

track->nbanks = 4;

drivers/gpu/drm/radeon/evergreen_cs.c

2807

track->nbanks = 8;

drivers/gpu/drm/radeon/evergreen_cs.c

2810

track->nbanks = 16;

drivers/gpu/drm/radeon/evergreen_cs.c

2816

track->group_size = 256;

drivers/gpu/drm/radeon/evergreen_cs.c

2820

track->group_size = 512;

drivers/gpu/drm/radeon/evergreen_cs.c

2826

track->row_size = 1;

drivers/gpu/drm/radeon/evergreen_cs.c

2830

track->row_size = 2;

drivers/gpu/drm/radeon/evergreen_cs.c

2833

track->row_size = 4;

drivers/gpu/drm/radeon/evergreen_cs.c

2837

p->track = track;

drivers/gpu/drm/radeon/evergreen_cs.c

2842

kfree(p->track);

drivers/gpu/drm/radeon/evergreen_cs.c

2843

p->track = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

2858

kfree(p->track);

drivers/gpu/drm/radeon/evergreen_cs.c

2859

p->track = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

2863

kfree(p->track);

drivers/gpu/drm/radeon/evergreen_cs.c

2864

p->track = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

2874

kfree(p->track);

drivers/gpu/drm/radeon/evergreen_cs.c

2875

p->track = NULL;

drivers/gpu/drm/radeon/evergreen_cs.c

397

struct evergreen_cs_track *track = p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

403

mslice = G_028C6C_SLICE_MAX(track->cb_color_view[id]) + 1;

drivers/gpu/drm/radeon/evergreen_cs.c

404

pitch = track->cb_color_pitch[id];

drivers/gpu/drm/radeon/evergreen_cs.c

405

slice = track->cb_color_slice[id];

drivers/gpu/drm/radeon/evergreen_cs.c

408

surf.mode = G_028C70_ARRAY_MODE(track->cb_color_info[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

409

surf.format = G_028C70_FORMAT(track->cb_color_info[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

410

surf.tsplit = G_028C74_TILE_SPLIT(track->cb_color_attrib[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

411

surf.nbanks = G_028C74_NUM_BANKS(track->cb_color_attrib[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

412

surf.bankw = G_028C74_BANK_WIDTH(track->cb_color_attrib[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

413

surf.bankh = G_028C74_BANK_HEIGHT(track->cb_color_attrib[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

414

surf.mtilea = G_028C74_MACRO_TILE_ASPECT(track->cb_color_attrib[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

420

id, track->cb_color_info[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

432

__func__, __LINE__, id, track->cb_color_pitch[id],

drivers/gpu/drm/radeon/evergreen_cs.c

433

track->cb_color_slice[id], track->cb_color_attrib[id],

drivers/gpu/drm/radeon/evergreen_cs.c

434

track->cb_color_info[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

438

offset = (u64)track->cb_color_bo_offset[id] << 8;

drivers/gpu/drm/radeon/evergreen_cs.c

446

if (offset > radeon_bo_size(track->cb_color_bo[id])) {

drivers/gpu/drm/radeon/evergreen_cs.c

459

bsize = radeon_bo_size(track->cb_color_bo[id]);

drivers/gpu/drm/radeon/evergreen_cs.c

460

tmp = (u64)track->cb_color_bo_offset[id] << 8;

drivers/gpu/drm/radeon/evergreen_cs.c

474

ib[track->cb_color_slice_idx[id]] = slice;

drivers/gpu/drm/radeon/evergreen_cs.c

483

(u64)track->cb_color_bo_offset[id] << 8, mslice,

drivers/gpu/drm/radeon/evergreen_cs.c

484

radeon_bo_size(track->cb_color_bo[id]), slice);

drivers/gpu/drm/radeon/evergreen_cs.c

500

struct evergreen_cs_track *track = p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

503

if (track->htile_bo == NULL) {

drivers/gpu/drm/radeon/evergreen_cs.c

505

__func__, __LINE__, track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

509

if (G_028ABC_LINEAR(track->htile_surface)) {

drivers/gpu/drm/radeon/evergreen_cs.c

513

nby = round_up(nby, track->npipes * 8);

drivers/gpu/drm/radeon/evergreen_cs.c

519

switch (track->npipes) {

drivers/gpu/drm/radeon/evergreen_cs.c

542

__func__, __LINE__, track->npipes);

drivers/gpu/drm/radeon/evergreen_cs.c

550

size = roundup(nbx * nby * 4, track->npipes * (2 << 10));

drivers/gpu/drm/radeon/evergreen_cs.c

551

size += track->htile_offset;

drivers/gpu/drm/radeon/evergreen_cs.c

553

if (size > radeon_bo_size(track->htile_bo)) {

drivers/gpu/drm/radeon/evergreen_cs.c

555

__func__, __LINE__, radeon_bo_size(track->htile_bo),

drivers/gpu/drm/radeon/evergreen_cs.c

564

struct evergreen_cs_track *track = p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

570

mslice = G_028008_SLICE_MAX(track->db_depth_view) + 1;

drivers/gpu/drm/radeon/evergreen_cs.c

571

pitch = G_028058_PITCH_TILE_MAX(track->db_depth_size);

drivers/gpu/drm/radeon/evergreen_cs.c

572

slice = track->db_depth_slice;

drivers/gpu/drm/radeon/evergreen_cs.c

575

surf.mode = G_028040_ARRAY_MODE(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

576

surf.format = G_028044_FORMAT(track->db_s_info);

drivers/gpu/drm/radeon/evergreen_cs.c

577

surf.tsplit = G_028044_TILE_SPLIT(track->db_s_info);

drivers/gpu/drm/radeon/evergreen_cs.c

578

surf.nbanks = G_028040_NUM_BANKS(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

579

surf.bankw = G_028040_BANK_WIDTH(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

580

surf.bankh = G_028040_BANK_HEIGHT(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

581

surf.mtilea = G_028040_MACRO_TILE_ASPECT(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

607

__func__, __LINE__, track->db_depth_size,

drivers/gpu/drm/radeon/evergreen_cs.c

608

track->db_depth_slice, track->db_s_info, track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

613

offset = (u64)track->db_s_read_offset << 8;

drivers/gpu/drm/radeon/evergreen_cs.c

620

if (offset > radeon_bo_size(track->db_s_read_bo)) {

drivers/gpu/drm/radeon/evergreen_cs.c

624

(u64)track->db_s_read_offset << 8, mslice,

drivers/gpu/drm/radeon/evergreen_cs.c

625

radeon_bo_size(track->db_s_read_bo));

drivers/gpu/drm/radeon/evergreen_cs.c

627

__func__, __LINE__, track->db_depth_size,

drivers/gpu/drm/radeon/evergreen_cs.c

628

track->db_depth_slice, track->db_s_info, track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

632

offset = (u64)track->db_s_write_offset << 8;

drivers/gpu/drm/radeon/evergreen_cs.c

639

if (offset > radeon_bo_size(track->db_s_write_bo)) {

drivers/gpu/drm/radeon/evergreen_cs.c

643

(u64)track->db_s_write_offset << 8, mslice,

drivers/gpu/drm/radeon/evergreen_cs.c

644

radeon_bo_size(track->db_s_write_bo));

drivers/gpu/drm/radeon/evergreen_cs.c

649

if (G_028040_TILE_SURFACE_ENABLE(track->db_z_info)) {

drivers/gpu/drm/radeon/evergreen_cs.c

661

struct evergreen_cs_track *track = p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

667

mslice = G_028008_SLICE_MAX(track->db_depth_view) + 1;

drivers/gpu/drm/radeon/evergreen_cs.c

668

pitch = G_028058_PITCH_TILE_MAX(track->db_depth_size);

drivers/gpu/drm/radeon/evergreen_cs.c

669

slice = track->db_depth_slice;

drivers/gpu/drm/radeon/evergreen_cs.c

672

surf.mode = G_028040_ARRAY_MODE(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

673

surf.format = G_028040_FORMAT(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

674

surf.tsplit = G_028040_TILE_SPLIT(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

675

surf.nbanks = G_028040_NUM_BANKS(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

676

surf.bankw = G_028040_BANK_WIDTH(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

677

surf.bankh = G_028040_BANK_HEIGHT(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

678

surf.mtilea = G_028040_MACRO_TILE_ASPECT(track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

698

__func__, __LINE__, track->db_depth_size,

drivers/gpu/drm/radeon/evergreen_cs.c

699

track->db_depth_slice, track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

706

__func__, __LINE__, track->db_depth_size,

drivers/gpu/drm/radeon/evergreen_cs.c

707

track->db_depth_slice, track->db_z_info);

drivers/gpu/drm/radeon/evergreen_cs.c

711

offset = (u64)track->db_z_read_offset << 8;

drivers/gpu/drm/radeon/evergreen_cs.c

718

if (offset > radeon_bo_size(track->db_z_read_bo)) {

drivers/gpu/drm/radeon/evergreen_cs.c

722

(u64)track->db_z_read_offset << 8, mslice,

drivers/gpu/drm/radeon/evergreen_cs.c

723

radeon_bo_size(track->db_z_read_bo));

drivers/gpu/drm/radeon/evergreen_cs.c

727

offset = (u64)track->db_z_write_offset << 8;

drivers/gpu/drm/radeon/evergreen_cs.c

734

if (offset > radeon_bo_size(track->db_z_write_bo)) {

drivers/gpu/drm/radeon/evergreen_cs.c

738

(u64)track->db_z_write_offset << 8, mslice,

drivers/gpu/drm/radeon/evergreen_cs.c

739

radeon_bo_size(track->db_z_write_bo));

drivers/gpu/drm/radeon/evergreen_cs.c

744

if (G_028040_TILE_SURFACE_ENABLE(track->db_z_info)) {

drivers/gpu/drm/radeon/evergreen_cs.c

935

struct evergreen_cs_track *track = p->track;

drivers/gpu/drm/radeon/evergreen_cs.c

941

if (track->streamout_dirty && track->vgt_strmout_config) {

drivers/gpu/drm/radeon/evergreen_cs.c

943

if (track->vgt_strmout_config & (1 << i)) {

drivers/gpu/drm/radeon/evergreen_cs.c

944

buffer_mask |= (track->vgt_strmout_buffer_config >> (i * 4)) & 0xf;

drivers/gpu/drm/radeon/evergreen_cs.c

950

if (track->vgt_strmout_bo[i]) {

drivers/gpu/drm/radeon/evergreen_cs.c

951

u64 offset = (u64)track->vgt_strmout_bo_offset[i] +

drivers/gpu/drm/radeon/evergreen_cs.c

952

(u64)track->vgt_strmout_size[i];

drivers/gpu/drm/radeon/evergreen_cs.c

953

if (offset > radeon_bo_size(track->vgt_strmout_bo[i])) {

drivers/gpu/drm/radeon/evergreen_cs.c

956

radeon_bo_size(track->vgt_strmout_bo[i]));

drivers/gpu/drm/radeon/evergreen_cs.c

965

track->streamout_dirty = false;

drivers/gpu/drm/radeon/evergreen_cs.c

968

if (track->sx_misc_kill_all_prims)

drivers/gpu/drm/radeon/evergreen_cs.c

973

if (track->cb_dirty) {

drivers/gpu/drm/radeon/evergreen_cs.c

974

tmp = track->cb_target_mask;

drivers/gpu/drm/radeon/evergreen_cs.c

976

u32 format = G_028C70_FORMAT(track->cb_color_info[i]);

drivers/gpu/drm/radeon/evergreen_cs.c

981

if (track->cb_color_bo[i] == NULL) {

drivers/gpu/drm/radeon/evergreen_cs.c

983

__func__, __LINE__, track->cb_target_mask, track->cb_shader_mask, i);

drivers/gpu/drm/radeon/evergreen_cs.c

993

track->cb_dirty = false;

drivers/gpu/drm/radeon/evergreen_cs.c

996

if (track->db_dirty) {

drivers/gpu/drm/radeon/evergreen_cs.c

998

if (G_028044_FORMAT(track->db_s_info) != V_028044_STENCIL_INVALID &&

drivers/gpu/drm/radeon/evergreen_cs.c

999

G_028800_STENCIL_ENABLE(track->db_depth_control)) {

drivers/gpu/drm/radeon/r100.c

1336

struct r100_cs_track *track;

drivers/gpu/drm/radeon/r100.c

1342

track = (struct r100_cs_track *)p->track;

drivers/gpu/drm/radeon/r100.c

1350

track->num_arrays = c;

drivers/gpu/drm/radeon/r100.c

1362

track->arrays[i + 0].esize = idx_value >> 8;

drivers/gpu/drm/radeon/r100.c

1363

track->arrays[i + 0].robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1364

track->arrays[i + 0].esize &= 0x7F;

drivers/gpu/drm/radeon/r100.c

1373

track->arrays[i + 1].robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1374

track->arrays[i + 1].esize = idx_value >> 24;

drivers/gpu/drm/radeon/r100.c

1375

track->arrays[i + 1].esize &= 0x7F;

drivers/gpu/drm/radeon/r100.c

1387

track->arrays[i + 0].robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1388

track->arrays[i + 0].esize = idx_value >> 8;

drivers/gpu/drm/radeon/r100.c

1389

track->arrays[i + 0].esize &= 0x7F;

drivers/gpu/drm/radeon/r100.c

1585

struct r100_cs_track *track;

drivers/gpu/drm/radeon/r100.c

1594

track = (struct r100_cs_track *)p->track;

drivers/gpu/drm/radeon/r100.c

1624

track->zb.robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1625

track->zb.offset = idx_value;

drivers/gpu/drm/radeon/r100.c

1626

track->zb_dirty = true;

drivers/gpu/drm/radeon/r100.c

1637

track->cb[0].robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1638

track->cb[0].offset = idx_value;

drivers/gpu/drm/radeon/r100.c

1639

track->cb_dirty = true;

drivers/gpu/drm/radeon/r100.c

1664

track->textures[i].robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1665

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1680

track->textures[0].cube_info[i].offset = idx_value;

drivers/gpu/drm/radeon/r100.c

1682

track->textures[0].cube_info[i].robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1683

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1698

track->textures[1].cube_info[i].offset = idx_value;

drivers/gpu/drm/radeon/r100.c

1700

track->textures[1].cube_info[i].robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1701

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1716

track->textures[2].cube_info[i].offset = idx_value;

drivers/gpu/drm/radeon/r100.c

1718

track->textures[2].cube_info[i].robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1719

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1722

track->maxy = ((idx_value >> 16) & 0x7FF);

drivers/gpu/drm/radeon/r100.c

1723

track->cb_dirty = true;

drivers/gpu/drm/radeon/r100.c

1724

track->zb_dirty = true;

drivers/gpu/drm/radeon/r100.c

1746

track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK;

drivers/gpu/drm/radeon/r100.c

1747

track->cb_dirty = true;

drivers/gpu/drm/radeon/r100.c

1750

track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK;

drivers/gpu/drm/radeon/r100.c

1751

track->zb_dirty = true;

drivers/gpu/drm/radeon/r100.c

1760

track->cb[0].cpp = 1;

drivers/gpu/drm/radeon/r100.c

1765

track->cb[0].cpp = 2;

drivers/gpu/drm/radeon/r100.c

1768

track->cb[0].cpp = 4;

drivers/gpu/drm/radeon/r100.c

1775

track->z_enabled = !!(idx_value & RADEON_Z_ENABLE);

drivers/gpu/drm/radeon/r100.c

1776

track->cb_dirty = true;

drivers/gpu/drm/radeon/r100.c

1777

track->zb_dirty = true;

drivers/gpu/drm/radeon/r100.c

1782

track->zb.cpp = 2;

drivers/gpu/drm/radeon/r100.c

1790

track->zb.cpp = 4;

drivers/gpu/drm/radeon/r100.c

1795

track->zb_dirty = true;

drivers/gpu/drm/radeon/r100.c

1810

for (i = 0; i < track->num_texture; i++)

drivers/gpu/drm/radeon/r100.c

1811

track->textures[i].enabled = !!(temp & (1 << i));

drivers/gpu/drm/radeon/r100.c

1812

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1816

track->vap_vf_cntl = idx_value;

drivers/gpu/drm/radeon/r100.c

1819

track->vtx_size = r100_get_vtx_size(idx_value);

drivers/gpu/drm/radeon/r100.c

1825

track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1;

drivers/gpu/drm/radeon/r100.c

1826

track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1;

drivers/gpu/drm/radeon/r100.c

1827

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1833

track->textures[i].pitch = idx_value + 32;

drivers/gpu/drm/radeon/r100.c

1834

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1840

track->textures[i].num_levels = ((idx_value & RADEON_MAX_MIP_LEVEL_MASK)

drivers/gpu/drm/radeon/r100.c

1844

track->textures[i].roundup_w = false;

drivers/gpu/drm/radeon/r100.c

1847

track->textures[i].roundup_h = false;

drivers/gpu/drm/radeon/r100.c

1848

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1855

track->textures[i].use_pitch = true;

drivers/gpu/drm/radeon/r100.c

1857

track->textures[i].use_pitch = false;

drivers/gpu/drm/radeon/r100.c

1858

track->textures[i].width = 1 << ((idx_value & RADEON_TXFORMAT_WIDTH_MASK) >> RADEON_TXFORMAT_WIDTH_SHIFT);

drivers/gpu/drm/radeon/r100.c

1859

track->textures[i].height = 1 << ((idx_value & RADEON_TXFORMAT_HEIGHT_MASK) >> RADEON_TXFORMAT_HEIGHT_SHIFT);

drivers/gpu/drm/radeon/r100.c

1862

track->textures[i].tex_coord_type = 2;

drivers/gpu/drm/radeon/r100.c

1867

track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r100.c

1868

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r100.c

1879

track->textures[i].cpp = 2;

drivers/gpu/drm/radeon/r100.c

1880

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r100.c

1886

track->textures[i].cpp = 4;

drivers/gpu/drm/radeon/r100.c

1887

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r100.c

1890

track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r100.c

1891

track->textures[i].compress_format = R100_TRACK_COMP_DXT1;

drivers/gpu/drm/radeon/r100.c

1895

track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r100.c

1896

track->textures[i].compress_format = R100_TRACK_COMP_DXT35;

drivers/gpu/drm/radeon/r100.c

1899

track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);

drivers/gpu/drm/radeon/r100.c

1900

track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf);

drivers/gpu/drm/radeon/r100.c

1901

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1909

track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf);

drivers/gpu/drm/radeon/r100.c

1910

track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf);

drivers/gpu/drm/radeon/r100.c

1912

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

1943

struct r100_cs_track *track;

drivers/gpu/drm/radeon/r100.c

1950

track = (struct r100_cs_track *)p->track;

drivers/gpu/drm/radeon/r100.c

1979

track->num_arrays = 1;

drivers/gpu/drm/radeon/r100.c

1980

track->vtx_size = r100_get_vtx_size(radeon_get_ib_value(p, idx + 2));

drivers/gpu/drm/radeon/r100.c

1982

track->arrays[0].robj = reloc->robj;

drivers/gpu/drm/radeon/r100.c

1983

track->arrays[0].esize = track->vtx_size;

drivers/gpu/drm/radeon/r100.c

1985

track->max_indx = radeon_get_ib_value(p, idx+1);

drivers/gpu/drm/radeon/r100.c

1987

track->vap_vf_cntl = radeon_get_ib_value(p, idx+3);

drivers/gpu/drm/radeon/r100.c

1988

track->immd_dwords = pkt->count - 1;

drivers/gpu/drm/radeon/r100.c

1989

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r100.c

1998

track->vtx_size = r100_get_vtx_size(radeon_get_ib_value(p, idx + 0));

drivers/gpu/drm/radeon/r100.c

1999

track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);

drivers/gpu/drm/radeon/r100.c

2000

track->immd_dwords = pkt->count - 1;

drivers/gpu/drm/radeon/r100.c

2001

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r100.c

2011

track->vap_vf_cntl = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r100.c

2012

track->immd_dwords = pkt->count;

drivers/gpu/drm/radeon/r100.c

2013

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r100.c

2019

track->vap_vf_cntl = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r100.c

2020

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r100.c

2026

track->vap_vf_cntl = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r100.c

2027

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r100.c

2033

track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);

drivers/gpu/drm/radeon/r100.c

2034

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r100.c

2040

track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);

drivers/gpu/drm/radeon/r100.c

2041

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r100.c

2063

struct r100_cs_track *track;

drivers/gpu/drm/radeon/r100.c

2066

track = kzalloc_obj(*track);

drivers/gpu/drm/radeon/r100.c

2067

if (!track)

drivers/gpu/drm/radeon/r100.c

2069

r100_cs_track_clear(p->rdev, track);

drivers/gpu/drm/radeon/r100.c

2070

p->track = track;

drivers/gpu/drm/radeon/r100.c

2154

struct r100_cs_track *track, unsigned idx)

drivers/gpu/drm/radeon/r100.c

2159

unsigned compress_format = track->textures[idx].compress_format;

drivers/gpu/drm/radeon/r100.c

2162

cube_robj = track->textures[idx].cube_info[face].robj;

drivers/gpu/drm/radeon/r100.c

2163

w = track->textures[idx].cube_info[face].width;

drivers/gpu/drm/radeon/r100.c

2164

h = track->textures[idx].cube_info[face].height;

drivers/gpu/drm/radeon/r100.c

2170

size *= track->textures[idx].cpp;

drivers/gpu/drm/radeon/r100.c

2172

size += track->textures[idx].cube_info[face].offset;

drivers/gpu/drm/radeon/r100.c

2178

r100_cs_track_texture_print(&track->textures[idx]);

drivers/gpu/drm/radeon/r100.c

2186

struct r100_cs_track *track)

drivers/gpu/drm/radeon/r100.c

2193

for (u = 0; u < track->num_texture; u++) {

drivers/gpu/drm/radeon/r100.c

2194

if (!track->textures[u].enabled)

drivers/gpu/drm/radeon/r100.c

2196

if (track->textures[u].lookup_disable)

drivers/gpu/drm/radeon/r100.c

2198

robj = track->textures[u].robj;

drivers/gpu/drm/radeon/r100.c

2204

for (i = 0; i <= track->textures[u].num_levels; i++) {

drivers/gpu/drm/radeon/r100.c

2205

if (track->textures[u].use_pitch) {

drivers/gpu/drm/radeon/r100.c

2207

w = (track->textures[u].pitch / track->textures[u].cpp) / (1 << i);

drivers/gpu/drm/radeon/r100.c

2209

w = track->textures[u].pitch / (1 << i);

drivers/gpu/drm/radeon/r100.c

2211

w = track->textures[u].width;

drivers/gpu/drm/radeon/r100.c

2213

w |= track->textures[u].width_11;

drivers/gpu/drm/radeon/r100.c

2215

if (track->textures[u].roundup_w)

drivers/gpu/drm/radeon/r100.c

2218

h = track->textures[u].height;

drivers/gpu/drm/radeon/r100.c

2220

h |= track->textures[u].height_11;

drivers/gpu/drm/radeon/r100.c

2222

if (track->textures[u].roundup_h)

drivers/gpu/drm/radeon/r100.c

2224

if (track->textures[u].tex_coord_type == 1) {

drivers/gpu/drm/radeon/r100.c

2225

d = (1 << track->textures[u].txdepth) / (1 << i);

drivers/gpu/drm/radeon/r100.c

2231

if (track->textures[u].compress_format) {

drivers/gpu/drm/radeon/r100.c

2233

size += r100_track_compress_size(track->textures[u].compress_format, w, h) * d;

drivers/gpu/drm/radeon/r100.c

2238

size *= track->textures[u].cpp;

drivers/gpu/drm/radeon/r100.c

2240

switch (track->textures[u].tex_coord_type) {

drivers/gpu/drm/radeon/r100.c

2245

if (track->separate_cube) {

drivers/gpu/drm/radeon/r100.c

2246

ret = r100_cs_track_cube(rdev, track, u);

drivers/gpu/drm/radeon/r100.c

2254

"%u\n", track->textures[u].tex_coord_type, u);

drivers/gpu/drm/radeon/r100.c

2260

r100_cs_track_texture_print(&track->textures[u]);

drivers/gpu/drm/radeon/r100.c

2267

int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track)

drivers/gpu/drm/radeon/r100.c

2273

unsigned num_cb = track->cb_dirty ? track->num_cb : 0;

drivers/gpu/drm/radeon/r100.c

2275

if (num_cb && !track->zb_cb_clear && !track->color_channel_mask &&

drivers/gpu/drm/radeon/r100.c

2276

!track->blend_read_enable)

drivers/gpu/drm/radeon/r100.c

2280

if (track->cb[i].robj == NULL) {

drivers/gpu/drm/radeon/r100.c

2284

size = track->cb[i].pitch * track->cb[i].cpp * track->maxy;

drivers/gpu/drm/radeon/r100.c

2285

size += track->cb[i].offset;

drivers/gpu/drm/radeon/r100.c

2286

if (size > radeon_bo_size(track->cb[i].robj)) {

drivers/gpu/drm/radeon/r100.c

2289

radeon_bo_size(track->cb[i].robj));

drivers/gpu/drm/radeon/r100.c

2291

i, track->cb[i].pitch, track->cb[i].cpp,

drivers/gpu/drm/radeon/r100.c

2292

track->cb[i].offset, track->maxy);

drivers/gpu/drm/radeon/r100.c

2296

track->cb_dirty = false;

drivers/gpu/drm/radeon/r100.c

2298

if (track->zb_dirty && track->z_enabled) {

drivers/gpu/drm/radeon/r100.c

2299

if (track->zb.robj == NULL) {

drivers/gpu/drm/radeon/r100.c

2303

size = track->zb.pitch * track->zb.cpp * track->maxy;

drivers/gpu/drm/radeon/r100.c

2304

size += track->zb.offset;

drivers/gpu/drm/radeon/r100.c

2305

if (size > radeon_bo_size(track->zb.robj)) {

drivers/gpu/drm/radeon/r100.c

2308

radeon_bo_size(track->zb.robj));

drivers/gpu/drm/radeon/r100.c

2310

track->zb.pitch, track->zb.cpp,

drivers/gpu/drm/radeon/r100.c

2311

track->zb.offset, track->maxy);

drivers/gpu/drm/radeon/r100.c

2315

track->zb_dirty = false;

drivers/gpu/drm/radeon/r100.c

2317

if (track->aa_dirty && track->aaresolve) {

drivers/gpu/drm/radeon/r100.c

2318

if (track->aa.robj == NULL) {

drivers/gpu/drm/radeon/r100.c

2323

size = track->aa.pitch * track->cb[0].cpp * track->maxy;

drivers/gpu/drm/radeon/r100.c

2324

size += track->aa.offset;

drivers/gpu/drm/radeon/r100.c

2325

if (size > radeon_bo_size(track->aa.robj)) {

drivers/gpu/drm/radeon/r100.c

2328

radeon_bo_size(track->aa.robj));

drivers/gpu/drm/radeon/r100.c

2330

i, track->aa.pitch, track->cb[0].cpp,

drivers/gpu/drm/radeon/r100.c

2331

track->aa.offset, track->maxy);

drivers/gpu/drm/radeon/r100.c

2335

track->aa_dirty = false;

drivers/gpu/drm/radeon/r100.c

2337

prim_walk = (track->vap_vf_cntl >> 4) & 0x3;

drivers/gpu/drm/radeon/r100.c

2338

if (track->vap_vf_cntl & (1 << 14)) {

drivers/gpu/drm/radeon/r100.c

2339

nverts = track->vap_alt_nverts;

drivers/gpu/drm/radeon/r100.c

2341

nverts = (track->vap_vf_cntl >> 16) & 0xFFFF;

drivers/gpu/drm/radeon/r100.c

2345

for (i = 0; i < track->num_arrays; i++) {

drivers/gpu/drm/radeon/r100.c

2346

size = track->arrays[i].esize * track->max_indx * 4UL;

drivers/gpu/drm/radeon/r100.c

2347

if (track->arrays[i].robj == NULL) {

drivers/gpu/drm/radeon/r100.c

2352

if (size > radeon_bo_size(track->arrays[i].robj)) {

drivers/gpu/drm/radeon/r100.c

2356

radeon_bo_size(track->arrays[i].robj)

drivers/gpu/drm/radeon/r100.c

2358

dev_warn_once(rdev->dev, "Max indices %u\n", track->max_indx);

drivers/gpu/drm/radeon/r100.c

2364

for (i = 0; i < track->num_arrays; i++) {

drivers/gpu/drm/radeon/r100.c

2365

size = track->arrays[i].esize * (nverts - 1) * 4UL;

drivers/gpu/drm/radeon/r100.c

2366

if (track->arrays[i].robj == NULL) {

drivers/gpu/drm/radeon/r100.c

2371

if (size > radeon_bo_size(track->arrays[i].robj)) {

drivers/gpu/drm/radeon/r100.c

2375

radeon_bo_size(track->arrays[i].robj)

drivers/gpu/drm/radeon/r100.c

2382

size = track->vtx_size * nverts;

drivers/gpu/drm/radeon/r100.c

2383

if (size != track->immd_dwords) {

drivers/gpu/drm/radeon/r100.c

2385

track->immd_dwords, size);

drivers/gpu/drm/radeon/r100.c

2387

nverts, track->vtx_size);

drivers/gpu/drm/radeon/r100.c

2397

if (track->tex_dirty) {

drivers/gpu/drm/radeon/r100.c

2398

track->tex_dirty = false;

drivers/gpu/drm/radeon/r100.c

2399

return r100_cs_track_texture_check(rdev, track);

drivers/gpu/drm/radeon/r100.c

2404

void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track)

drivers/gpu/drm/radeon/r100.c

2408

track->cb_dirty = true;

drivers/gpu/drm/radeon/r100.c

2409

track->zb_dirty = true;

drivers/gpu/drm/radeon/r100.c

2410

track->tex_dirty = true;

drivers/gpu/drm/radeon/r100.c

2411

track->aa_dirty = true;

drivers/gpu/drm/radeon/r100.c

2414

track->num_cb = 1;

drivers/gpu/drm/radeon/r100.c

2416

track->num_texture = 3;

drivers/gpu/drm/radeon/r100.c

2418

track->num_texture = 6;

drivers/gpu/drm/radeon/r100.c

2419

track->maxy = 2048;

drivers/gpu/drm/radeon/r100.c

2420

track->separate_cube = true;

drivers/gpu/drm/radeon/r100.c

2422

track->num_cb = 4;

drivers/gpu/drm/radeon/r100.c

2423

track->num_texture = 16;

drivers/gpu/drm/radeon/r100.c

2424

track->maxy = 4096;

drivers/gpu/drm/radeon/r100.c

2425

track->separate_cube = false;

drivers/gpu/drm/radeon/r100.c

2426

track->aaresolve = false;

drivers/gpu/drm/radeon/r100.c

2427

track->aa.robj = NULL;

drivers/gpu/drm/radeon/r100.c

2430

for (i = 0; i < track->num_cb; i++) {

drivers/gpu/drm/radeon/r100.c

2431

track->cb[i].robj = NULL;

drivers/gpu/drm/radeon/r100.c

2432

track->cb[i].pitch = 8192;

drivers/gpu/drm/radeon/r100.c

2433

track->cb[i].cpp = 16;

drivers/gpu/drm/radeon/r100.c

2434

track->cb[i].offset = 0;

drivers/gpu/drm/radeon/r100.c

2436

track->z_enabled = true;

drivers/gpu/drm/radeon/r100.c

2437

track->zb.robj = NULL;

drivers/gpu/drm/radeon/r100.c

2438

track->zb.pitch = 8192;

drivers/gpu/drm/radeon/r100.c

2439

track->zb.cpp = 4;

drivers/gpu/drm/radeon/r100.c

2440

track->zb.offset = 0;

drivers/gpu/drm/radeon/r100.c

2441

track->vtx_size = 0x7F;

drivers/gpu/drm/radeon/r100.c

2442

track->immd_dwords = 0xFFFFFFFFUL;

drivers/gpu/drm/radeon/r100.c

2443

track->num_arrays = 11;

drivers/gpu/drm/radeon/r100.c

2444

track->max_indx = 0x00FFFFFFUL;

drivers/gpu/drm/radeon/r100.c

2445

for (i = 0; i < track->num_arrays; i++) {

drivers/gpu/drm/radeon/r100.c

2446

track->arrays[i].robj = NULL;

drivers/gpu/drm/radeon/r100.c

2447

track->arrays[i].esize = 0x7F;

drivers/gpu/drm/radeon/r100.c

2449

for (i = 0; i < track->num_texture; i++) {

drivers/gpu/drm/radeon/r100.c

2450

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r100.c

2451

track->textures[i].pitch = 16536;

drivers/gpu/drm/radeon/r100.c

2452

track->textures[i].width = 16536;

drivers/gpu/drm/radeon/r100.c

2453

track->textures[i].height = 16536;

drivers/gpu/drm/radeon/r100.c

2454

track->textures[i].width_11 = 1 << 11;

drivers/gpu/drm/radeon/r100.c

2455

track->textures[i].height_11 = 1 << 11;

drivers/gpu/drm/radeon/r100.c

2456

track->textures[i].num_levels = 12;

drivers/gpu/drm/radeon/r100.c

2458

track->textures[i].tex_coord_type = 0;

drivers/gpu/drm/radeon/r100.c

2459

track->textures[i].txdepth = 0;

drivers/gpu/drm/radeon/r100.c

2461

track->textures[i].txdepth = 16;

drivers/gpu/drm/radeon/r100.c

2462

track->textures[i].tex_coord_type = 1;

drivers/gpu/drm/radeon/r100.c

2464

track->textures[i].cpp = 64;

drivers/gpu/drm/radeon/r100.c

2465

track->textures[i].robj = NULL;

drivers/gpu/drm/radeon/r100.c

2467

track->textures[i].enabled = false;

drivers/gpu/drm/radeon/r100.c

2468

track->textures[i].lookup_disable = false;

drivers/gpu/drm/radeon/r100.c

2469

track->textures[i].roundup_w = true;

drivers/gpu/drm/radeon/r100.c

2470

track->textures[i].roundup_h = true;

drivers/gpu/drm/radeon/r100.c

2471

if (track->separate_cube)

drivers/gpu/drm/radeon/r100.c

2473

track->textures[i].cube_info[face].robj = NULL;

drivers/gpu/drm/radeon/r100.c

2474

track->textures[i].cube_info[face].width = 16536;

drivers/gpu/drm/radeon/r100.c

2475

track->textures[i].cube_info[face].height = 16536;

drivers/gpu/drm/radeon/r100.c

2476

track->textures[i].cube_info[face].offset = 0;

drivers/gpu/drm/radeon/r100_track.h

85

int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track);

drivers/gpu/drm/radeon/r100_track.h

86

void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track);

drivers/gpu/drm/radeon/r200.c

150

struct r100_cs_track *track;

drivers/gpu/drm/radeon/r200.c

160

track = (struct r100_cs_track *)p->track;

drivers/gpu/drm/radeon/r200.c

188

track->zb.robj = reloc->robj;

drivers/gpu/drm/radeon/r200.c

189

track->zb.offset = idx_value;

drivers/gpu/drm/radeon/r200.c

190

track->zb_dirty = true;

drivers/gpu/drm/radeon/r200.c

201

track->cb[0].robj = reloc->robj;

drivers/gpu/drm/radeon/r200.c

202

track->cb[0].offset = idx_value;

drivers/gpu/drm/radeon/r200.c

203

track->cb_dirty = true;

drivers/gpu/drm/radeon/r200.c

231

track->textures[i].robj = reloc->robj;

drivers/gpu/drm/radeon/r200.c

232

track->tex_dirty = true;

drivers/gpu/drm/radeon/r200.c

273

track->textures[i].cube_info[face - 1].offset = idx_value;

drivers/gpu/drm/radeon/r200.c

275

track->textures[i].cube_info[face - 1].robj = reloc->robj;

drivers/gpu/drm/radeon/r200.c

276

track->tex_dirty = true;

drivers/gpu/drm/radeon/r200.c

279

track->maxy = ((idx_value >> 16) & 0x7FF);

drivers/gpu/drm/radeon/r200.c

280

track->cb_dirty = true;

drivers/gpu/drm/radeon/r200.c

281

track->zb_dirty = true;

drivers/gpu/drm/radeon/r200.c

304

track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK;

drivers/gpu/drm/radeon/r200.c

305

track->cb_dirty = true;

drivers/gpu/drm/radeon/r200.c

308

track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK;

drivers/gpu/drm/radeon/r200.c

309

track->zb_dirty = true;

drivers/gpu/drm/radeon/r200.c

318

track->cb[0].cpp = 1;

drivers/gpu/drm/radeon/r200.c

323

track->cb[0].cpp = 2;

drivers/gpu/drm/radeon/r200.c

326

track->cb[0].cpp = 4;

drivers/gpu/drm/radeon/r200.c

338

track->z_enabled = !!(idx_value & RADEON_Z_ENABLE);

drivers/gpu/drm/radeon/r200.c

339

track->cb_dirty = true;

drivers/gpu/drm/radeon/r200.c

340

track->zb_dirty = true;

drivers/gpu/drm/radeon/r200.c

345

track->zb.cpp = 2;

drivers/gpu/drm/radeon/r200.c

353

track->zb.cpp = 4;

drivers/gpu/drm/radeon/r200.c

358

track->zb_dirty = true;

drivers/gpu/drm/radeon/r200.c

373

for (i = 0; i < track->num_texture; i++)

drivers/gpu/drm/radeon/r200.c

374

track->textures[i].enabled = !!(temp & (1 << i));

drivers/gpu/drm/radeon/r200.c

375

track->tex_dirty = true;

drivers/gpu/drm/radeon/r200.c

379

track->vap_vf_cntl = idx_value;

drivers/gpu/drm/radeon/r200.c

383

track->max_indx = idx_value & 0x00FFFFFFUL;

drivers/gpu/drm/radeon/r200.c

386

track->vtx_size = r200_get_vtx_size_0(idx_value);

drivers/gpu/drm/radeon/r200.c

389

track->vtx_size += r200_get_vtx_size_1(idx_value);

drivers/gpu/drm/radeon/r200.c

398

track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1;

drivers/gpu/drm/radeon/r200.c

399

track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1;

drivers/gpu/drm/radeon/r200.c

400

track->tex_dirty = true;

drivers/gpu/drm/radeon/r200.c

409

track->textures[i].pitch = idx_value + 32;

drivers/gpu/drm/radeon/r200.c

410

track->tex_dirty = true;

drivers/gpu/drm/radeon/r200.c

419

track->textures[i].num_levels = ((idx_value & R200_MAX_MIP_LEVEL_MASK)

drivers/gpu/drm/radeon/r200.c

423

track->textures[i].roundup_w = false;

drivers/gpu/drm/radeon/r200.c

426

track->textures[i].roundup_h = false;

drivers/gpu/drm/radeon/r200.c

427

track->tex_dirty = true;

drivers/gpu/drm/radeon/r200.c

444

track->textures[i].txdepth = idx_value & 0x7;

drivers/gpu/drm/radeon/r200.c

455

track->textures[i].tex_coord_type = 0;

drivers/gpu/drm/radeon/r200.c

459

track->textures[i].tex_coord_type = 2;

drivers/gpu/drm/radeon/r200.c

463

track->textures[i].tex_coord_type = 1;

drivers/gpu/drm/radeon/r200.c

466

track->tex_dirty = true;

drivers/gpu/drm/radeon/r200.c

476

track->textures[i].use_pitch = 1;

drivers/gpu/drm/radeon/r200.c

478

track->textures[i].use_pitch = 0;

drivers/gpu/drm/radeon/r200.c

479

track->textures[i].width = 1 << ((idx_value & RADEON_TXFORMAT_WIDTH_MASK) >> RADEON_TXFORMAT_WIDTH_SHIFT);

drivers/gpu/drm/radeon/r200.c

480

track->textures[i].height = 1 << ((idx_value & RADEON_TXFORMAT_HEIGHT_MASK) >> RADEON_TXFORMAT_HEIGHT_SHIFT);

drivers/gpu/drm/radeon/r200.c

483

track->textures[i].lookup_disable = true;

drivers/gpu/drm/radeon/r200.c

488

track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r200.c

489

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r200.c

500

track->textures[i].cpp = 2;

drivers/gpu/drm/radeon/r200.c

501

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r200.c

508

track->textures[i].cpp = 4;

drivers/gpu/drm/radeon/r200.c

509

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r200.c

512

track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r200.c

513

track->textures[i].compress_format = R100_TRACK_COMP_DXT1;

drivers/gpu/drm/radeon/r200.c

517

track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r200.c

518

track->textures[i].compress_format = R100_TRACK_COMP_DXT1;

drivers/gpu/drm/radeon/r200.c

521

track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);

drivers/gpu/drm/radeon/r200.c

522

track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf);

drivers/gpu/drm/radeon/r200.c

523

track->tex_dirty = true;

drivers/gpu/drm/radeon/r200.c

534

track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf);

drivers/gpu/drm/radeon/r200.c

535

track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf);

drivers/gpu/drm/radeon/r200.c

537

track->tex_dirty = true;

drivers/gpu/drm/radeon/r300.c

1003

track->textures[i].roundup_w = false;

drivers/gpu/drm/radeon/r300.c

1007

track->textures[i].roundup_h = false;

drivers/gpu/drm/radeon/r300.c

1009

track->tex_dirty = true;

drivers/gpu/drm/radeon/r300.c

1030

track->textures[i].pitch = tmp + 1;

drivers/gpu/drm/radeon/r300.c

1033

track->textures[i].width_11 = tmp;

drivers/gpu/drm/radeon/r300.c

1035

track->textures[i].height_11 = tmp;

drivers/gpu/drm/radeon/r300.c

1040

track->textures[i].compress_format =

drivers/gpu/drm/radeon/r300.c

1047

track->tex_dirty = true;

drivers/gpu/drm/radeon/r300.c

1068

track->textures[i].width = tmp + 1;

drivers/gpu/drm/radeon/r300.c

1070

track->textures[i].height = tmp + 1;

drivers/gpu/drm/radeon/r300.c

1072

track->textures[i].num_levels = tmp;

drivers/gpu/drm/radeon/r300.c

1074

track->textures[i].use_pitch = !!tmp;

drivers/gpu/drm/radeon/r300.c

1076

track->textures[i].txdepth = tmp;

drivers/gpu/drm/radeon/r300.c

1077

track->tex_dirty = true;

drivers/gpu/drm/radeon/r300.c

1091

track->color_channel_mask = idx_value;

drivers/gpu/drm/radeon/r300.c

1092

track->cb_dirty = true;

drivers/gpu/drm/radeon/r300.c

1105

track->zb_cb_clear = !!(idx_value & (1 << 5));

drivers/gpu/drm/radeon/r300.c

1106

track->cb_dirty = true;

drivers/gpu/drm/radeon/r300.c

1107

track->zb_dirty = true;

drivers/gpu/drm/radeon/r300.c

1118

track->blend_read_enable = !!(idx_value & (1 << 2));

drivers/gpu/drm/radeon/r300.c

1119

track->cb_dirty = true;

drivers/gpu/drm/radeon/r300.c

1129

track->aa.robj = reloc->robj;

drivers/gpu/drm/radeon/r300.c

1130

track->aa.offset = idx_value;

drivers/gpu/drm/radeon/r300.c

1131

track->aa_dirty = true;

drivers/gpu/drm/radeon/r300.c

1135

track->aa.pitch = idx_value & 0x3FFE;

drivers/gpu/drm/radeon/r300.c

1136

track->aa_dirty = true;

drivers/gpu/drm/radeon/r300.c

1139

track->aaresolve = idx_value & 0x1;

drivers/gpu/drm/radeon/r300.c

1140

track->aa_dirty = true;

drivers/gpu/drm/radeon/r300.c

1177

struct r100_cs_track *track;

drivers/gpu/drm/radeon/r300.c

1184

track = (struct r100_cs_track *)p->track;

drivers/gpu/drm/radeon/r300.c

1213

track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);

drivers/gpu/drm/radeon/r300.c

1214

track->immd_dwords = pkt->count - 1;

drivers/gpu/drm/radeon/r300.c

1215

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r300.c

1228

track->vap_vf_cntl = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r300.c

1229

track->immd_dwords = pkt->count;

drivers/gpu/drm/radeon/r300.c

1230

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r300.c

1236

track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);

drivers/gpu/drm/radeon/r300.c

1237

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r300.c

1243

track->vap_vf_cntl = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r300.c

1244

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r300.c

1250

track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);

drivers/gpu/drm/radeon/r300.c

1251

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r300.c

1257

track->vap_vf_cntl = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r300.c

1258

r = r100_cs_track_check(p->rdev, track);

drivers/gpu/drm/radeon/r300.c

1284

struct r100_cs_track *track;

drivers/gpu/drm/radeon/r300.c

1287

track = kzalloc_obj(*track);

drivers/gpu/drm/radeon/r300.c

1288

if (track == NULL)

drivers/gpu/drm/radeon/r300.c

1290

r100_cs_track_clear(p->rdev, track);

drivers/gpu/drm/radeon/r300.c

1291

p->track = track;

drivers/gpu/drm/radeon/r300.c

632

struct r100_cs_track *track;

drivers/gpu/drm/radeon/r300.c

640

track = (struct r100_cs_track *)p->track;

drivers/gpu/drm/radeon/r300.c

672

track->cb[i].robj = reloc->robj;

drivers/gpu/drm/radeon/r300.c

673

track->cb[i].offset = idx_value;

drivers/gpu/drm/radeon/r300.c

674

track->cb_dirty = true;

drivers/gpu/drm/radeon/r300.c

685

track->zb.robj = reloc->robj;

drivers/gpu/drm/radeon/r300.c

686

track->zb.offset = idx_value;

drivers/gpu/drm/radeon/r300.c

687

track->zb_dirty = true;

drivers/gpu/drm/radeon/r300.c

730

track->textures[i].robj = reloc->robj;

drivers/gpu/drm/radeon/r300.c

731

track->tex_dirty = true;

drivers/gpu/drm/radeon/r300.c

736

track->vap_vf_cntl = idx_value;

drivers/gpu/drm/radeon/r300.c

740

track->vtx_size = idx_value & 0x7F;

drivers/gpu/drm/radeon/r300.c

744

track->max_indx = idx_value & 0x00FFFFFFUL;

drivers/gpu/drm/radeon/r300.c

750

track->vap_alt_nverts = idx_value & 0xFFFFFF;

drivers/gpu/drm/radeon/r300.c

754

track->maxy = ((idx_value >> 13) & 0x1FFF) + 1;

drivers/gpu/drm/radeon/r300.c

756

track->maxy -= 1440;

drivers/gpu/drm/radeon/r300.c

758

track->cb_dirty = true;

drivers/gpu/drm/radeon/r300.c

759

track->zb_dirty = true;

drivers/gpu/drm/radeon/r300.c

768

track->num_cb = ((idx_value >> 5) & 0x3) + 1;

drivers/gpu/drm/radeon/r300.c

769

track->cb_dirty = true;

drivers/gpu/drm/radeon/r300.c

800

track->cb[i].pitch = idx_value & 0x3FFE;

drivers/gpu/drm/radeon/r300.c

805

track->cb[i].cpp = 1;

drivers/gpu/drm/radeon/r300.c

811

track->cb[i].cpp = 2;

drivers/gpu/drm/radeon/r300.c

821

track->cb[i].cpp = 4;

drivers/gpu/drm/radeon/r300.c

824

track->cb[i].cpp = 8;

drivers/gpu/drm/radeon/r300.c

827

track->cb[i].cpp = 16;

drivers/gpu/drm/radeon/r300.c

834

track->cb_dirty = true;

drivers/gpu/drm/radeon/r300.c

839

track->z_enabled = true;

drivers/gpu/drm/radeon/r300.c

841

track->z_enabled = false;

drivers/gpu/drm/radeon/r300.c

843

track->zb_dirty = true;

drivers/gpu/drm/radeon/r300.c

850

track->zb.cpp = 2;

drivers/gpu/drm/radeon/r300.c

853

track->zb.cpp = 4;

drivers/gpu/drm/radeon/r300.c

860

track->zb_dirty = true;

drivers/gpu/drm/radeon/r300.c

884

track->zb.pitch = idx_value & 0x3FFC;

drivers/gpu/drm/radeon/r300.c

885

track->zb_dirty = true;

drivers/gpu/drm/radeon/r300.c

893

track->textures[i].enabled = enabled;

drivers/gpu/drm/radeon/r300.c

895

track->tex_dirty = true;

drivers/gpu/drm/radeon/r300.c

916

track->textures[i].tex_coord_type = tmp;

drivers/gpu/drm/radeon/r300.c

921

track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r300.c

922

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r300.c

934

track->textures[i].cpp = 2;

drivers/gpu/drm/radeon/r300.c

935

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r300.c

946

track->textures[i].cpp = 4;

drivers/gpu/drm/radeon/r300.c

947

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r300.c

952

track->textures[i].cpp = 8;

drivers/gpu/drm/radeon/r300.c

953

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r300.c

956

track->textures[i].cpp = 16;

drivers/gpu/drm/radeon/r300.c

957

track->textures[i].compress_format = R100_TRACK_COMP_NONE;

drivers/gpu/drm/radeon/r300.c

960

track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r300.c

961

track->textures[i].compress_format = R100_TRACK_COMP_DXT1;

drivers/gpu/drm/radeon/r300.c

973

track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r300.c

974

track->textures[i].compress_format = R100_TRACK_COMP_DXT35;

drivers/gpu/drm/radeon/r300.c

981

track->tex_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1028

track->sq_config = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1031

track->db_depth_control = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1032

track->db_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1043

track->db_depth_info = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1045

track->db_depth_info &= C_028010_ARRAY_MODE;

drivers/gpu/drm/radeon/r600_cs.c

1048

track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_2D_TILED_THIN1);

drivers/gpu/drm/radeon/r600_cs.c

1051

track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_1D_TILED_THIN1);

drivers/gpu/drm/radeon/r600_cs.c

1054

track->db_depth_info = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1056

track->db_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1059

track->db_depth_view = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1060

track->db_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1063

track->db_depth_size = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1064

track->db_depth_size_idx = idx;

drivers/gpu/drm/radeon/r600_cs.c

1065

track->db_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1068

track->vgt_strmout_en = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1069

track->streamout_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1072

track->vgt_strmout_buffer_en = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1073

track->streamout_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1086

track->vgt_strmout_bo_offset[tmp] = radeon_get_ib_value(p, idx) << 8;

drivers/gpu/drm/radeon/r600_cs.c

1088

track->vgt_strmout_bo[tmp] = reloc->robj;

drivers/gpu/drm/radeon/r600_cs.c

1089

track->vgt_strmout_bo_mc[tmp] = reloc->gpu_offset;

drivers/gpu/drm/radeon/r600_cs.c

1090

track->streamout_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1098

track->vgt_strmout_size[tmp] = radeon_get_ib_value(p, idx) * 4;

drivers/gpu/drm/radeon/r600_cs.c

1099

track->streamout_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1111

track->cb_target_mask = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1112

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1115

track->cb_shader_mask = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1119

track->log_nsamples = tmp;

drivers/gpu/drm/radeon/r600_cs.c

1120

track->nsamples = 1 << tmp;

drivers/gpu/drm/radeon/r600_cs.c

1121

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1125

track->is_resolve = tmp == V_028808_SPECIAL_RESOLVE_BOX;

drivers/gpu/drm/radeon/r600_cs.c

1126

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1144

track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1147

track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_2D_TILED_THIN1);

drivers/gpu/drm/radeon/r600_cs.c

1150

track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_1D_TILED_THIN1);

drivers/gpu/drm/radeon/r600_cs.c

1154

track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1156

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1167

track->cb_color_view[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1168

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1179

track->cb_color_size[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1180

track->cb_color_size_idx[tmp] = idx;

drivers/gpu/drm/radeon/r600_cs.c

1181

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1202

if (!track->cb_color_base_last[tmp]) {

drivers/gpu/drm/radeon/r600_cs.c

1206

track->cb_color_frag_bo[tmp] = track->cb_color_bo[tmp];

drivers/gpu/drm/radeon/r600_cs.c

1207

track->cb_color_frag_offset[tmp] = track->cb_color_bo_offset[tmp];

drivers/gpu/drm/radeon/r600_cs.c

1208

ib[idx] = track->cb_color_base_last[tmp];

drivers/gpu/drm/radeon/r600_cs.c

1215

track->cb_color_frag_bo[tmp] = reloc->robj;

drivers/gpu/drm/radeon/r600_cs.c

1216

track->cb_color_frag_offset[tmp] = (u64)ib[idx] << 8;

drivers/gpu/drm/radeon/r600_cs.c

1219

if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) {

drivers/gpu/drm/radeon/r600_cs.c

1220

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1233

if (!track->cb_color_base_last[tmp]) {

drivers/gpu/drm/radeon/r600_cs.c

1237

track->cb_color_tile_bo[tmp] = track->cb_color_bo[tmp];

drivers/gpu/drm/radeon/r600_cs.c

1238

track->cb_color_tile_offset[tmp] = track->cb_color_bo_offset[tmp];

drivers/gpu/drm/radeon/r600_cs.c

1239

ib[idx] = track->cb_color_base_last[tmp];

drivers/gpu/drm/radeon/r600_cs.c

1246

track->cb_color_tile_bo[tmp] = reloc->robj;

drivers/gpu/drm/radeon/r600_cs.c

1247

track->cb_color_tile_offset[tmp] = (u64)ib[idx] << 8;

drivers/gpu/drm/radeon/r600_cs.c

1250

if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) {

drivers/gpu/drm/radeon/r600_cs.c

1251

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1263

track->cb_color_mask[tmp] = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1264

if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) {

drivers/gpu/drm/radeon/r600_cs.c

1265

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1283

track->cb_color_bo_offset[tmp] = (u64)radeon_get_ib_value(p, idx) << 8;

drivers/gpu/drm/radeon/r600_cs.c

1285

track->cb_color_base_last[tmp] = ib[idx];

drivers/gpu/drm/radeon/r600_cs.c

1286

track->cb_color_bo[tmp] = reloc->robj;

drivers/gpu/drm/radeon/r600_cs.c

1287

track->cb_color_bo_mc[tmp] = reloc->gpu_offset;

drivers/gpu/drm/radeon/r600_cs.c

1288

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1297

track->db_offset = radeon_get_ib_value(p, idx) << 8;

drivers/gpu/drm/radeon/r600_cs.c

1299

track->db_bo = reloc->robj;

drivers/gpu/drm/radeon/r600_cs.c

1300

track->db_bo_mc = reloc->gpu_offset;

drivers/gpu/drm/radeon/r600_cs.c

1301

track->db_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1310

track->htile_offset = (u64)radeon_get_ib_value(p, idx) << 8;

drivers/gpu/drm/radeon/r600_cs.c

1312

track->htile_bo = reloc->robj;

drivers/gpu/drm/radeon/r600_cs.c

1313

track->db_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1316

track->htile_surface = radeon_get_ib_value(p, idx);

drivers/gpu/drm/radeon/r600_cs.c

1319

track->db_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

1392

track->sx_misc_kill_all_prims = (radeon_get_ib_value(p, idx) & 0x1) != 0;

drivers/gpu/drm/radeon/r600_cs.c

1481

struct r600_cs_track *track = p->track;

drivers/gpu/drm/radeon/r600_cs.c

1521

array_check.group_size = track->group_size;

drivers/gpu/drm/radeon/r600_cs.c

1522

array_check.nbanks = track->nbanks;

drivers/gpu/drm/radeon/r600_cs.c

1523

array_check.npipes = track->npipes;

drivers/gpu/drm/radeon/r600_cs.c

1635

struct r600_cs_track *track;

drivers/gpu/drm/radeon/r600_cs.c

1643

track = (struct r600_cs_track *)p->track;

drivers/gpu/drm/radeon/r600_cs.c

2029

if (track->sq_config & DX9_CONSTS) {

drivers/gpu/drm/radeon/r600_cs.c

2107

if (reloc->robj != track->vgt_strmout_bo[idx_value]) {

drivers/gpu/drm/radeon/r600_cs.c

2113

if (offset != track->vgt_strmout_bo_offset[idx_value]) {

drivers/gpu/drm/radeon/r600_cs.c

2116

offset, track->vgt_strmout_bo_offset[idx_value]);

drivers/gpu/drm/radeon/r600_cs.c

2280

struct r600_cs_track *track;

drivers/gpu/drm/radeon/r600_cs.c

2283

if (p->track == NULL) {

drivers/gpu/drm/radeon/r600_cs.c

2285

track = kzalloc_obj(*track);

drivers/gpu/drm/radeon/r600_cs.c

2286

if (track == NULL)

drivers/gpu/drm/radeon/r600_cs.c

2288

r600_cs_track_init(track);

drivers/gpu/drm/radeon/r600_cs.c

2290

track->npipes = p->rdev->config.r600.tiling_npipes;

drivers/gpu/drm/radeon/r600_cs.c

2291

track->nbanks = p->rdev->config.r600.tiling_nbanks;

drivers/gpu/drm/radeon/r600_cs.c

2292

track->group_size = p->rdev->config.r600.tiling_group_size;

drivers/gpu/drm/radeon/r600_cs.c

2294

track->npipes = p->rdev->config.rv770.tiling_npipes;

drivers/gpu/drm/radeon/r600_cs.c

2295

track->nbanks = p->rdev->config.rv770.tiling_nbanks;

drivers/gpu/drm/radeon/r600_cs.c

2296

track->group_size = p->rdev->config.rv770.tiling_group_size;

drivers/gpu/drm/radeon/r600_cs.c

2298

p->track = track;

drivers/gpu/drm/radeon/r600_cs.c

2303

kfree(p->track);

drivers/gpu/drm/radeon/r600_cs.c

2304

p->track = NULL;

drivers/gpu/drm/radeon/r600_cs.c

2319

kfree(p->track);

drivers/gpu/drm/radeon/r600_cs.c

2320

p->track = NULL;

drivers/gpu/drm/radeon/r600_cs.c

2324

kfree(p->track);

drivers/gpu/drm/radeon/r600_cs.c

2325

p->track = NULL;

drivers/gpu/drm/radeon/r600_cs.c

2335

kfree(p->track);

drivers/gpu/drm/radeon/r600_cs.c

2336

p->track = NULL;

drivers/gpu/drm/radeon/r600_cs.c

299

static void r600_cs_track_init(struct r600_cs_track *track)

drivers/gpu/drm/radeon/r600_cs.c

304

track->sq_config = DX9_CONSTS;

drivers/gpu/drm/radeon/r600_cs.c

306

track->cb_color_base_last[i] = 0;

drivers/gpu/drm/radeon/r600_cs.c

307

track->cb_color_size[i] = 0;

drivers/gpu/drm/radeon/r600_cs.c

308

track->cb_color_size_idx[i] = 0;

drivers/gpu/drm/radeon/r600_cs.c

309

track->cb_color_info[i] = 0;

drivers/gpu/drm/radeon/r600_cs.c

310

track->cb_color_view[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

311

track->cb_color_bo[i] = NULL;

drivers/gpu/drm/radeon/r600_cs.c

312

track->cb_color_bo_offset[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

313

track->cb_color_bo_mc[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

314

track->cb_color_frag_bo[i] = NULL;

drivers/gpu/drm/radeon/r600_cs.c

315

track->cb_color_frag_offset[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

316

track->cb_color_tile_bo[i] = NULL;

drivers/gpu/drm/radeon/r600_cs.c

317

track->cb_color_tile_offset[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

318

track->cb_color_mask[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

320

track->is_resolve = false;

drivers/gpu/drm/radeon/r600_cs.c

321

track->nsamples = 16;

drivers/gpu/drm/radeon/r600_cs.c

322

track->log_nsamples = 4;

drivers/gpu/drm/radeon/r600_cs.c

323

track->cb_target_mask = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

324

track->cb_shader_mask = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

325

track->cb_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

326

track->db_bo = NULL;

drivers/gpu/drm/radeon/r600_cs.c

327

track->db_bo_mc = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

329

track->db_depth_info = 7 | (1 << 25);

drivers/gpu/drm/radeon/r600_cs.c

330

track->db_depth_view = 0xFFFFC000;

drivers/gpu/drm/radeon/r600_cs.c

331

track->db_depth_size = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

332

track->db_depth_size_idx = 0;

drivers/gpu/drm/radeon/r600_cs.c

333

track->db_depth_control = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

334

track->db_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

335

track->htile_bo = NULL;

drivers/gpu/drm/radeon/r600_cs.c

336

track->htile_offset = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

337

track->htile_surface = 0;

drivers/gpu/drm/radeon/r600_cs.c

340

track->vgt_strmout_size[i] = 0;

drivers/gpu/drm/radeon/r600_cs.c

341

track->vgt_strmout_bo[i] = NULL;

drivers/gpu/drm/radeon/r600_cs.c

342

track->vgt_strmout_bo_offset[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

343

track->vgt_strmout_bo_mc[i] = 0xFFFFFFFF;

drivers/gpu/drm/radeon/r600_cs.c

345

track->streamout_dirty = true;

drivers/gpu/drm/radeon/r600_cs.c

346

track->sx_misc_kill_all_prims = false;

drivers/gpu/drm/radeon/r600_cs.c

351

struct r600_cs_track *track = p->track;

drivers/gpu/drm/radeon/r600_cs.c

360

unsigned nsamples = track->is_resolve && i == 1 ? 1 : track->nsamples;

drivers/gpu/drm/radeon/r600_cs.c

362

format = G_0280A0_FORMAT(track->cb_color_info[i]);

drivers/gpu/drm/radeon/r600_cs.c

366

i, track->cb_color_info[i]);

drivers/gpu/drm/radeon/r600_cs.c

370

pitch = (G_028060_PITCH_TILE_MAX(track->cb_color_size[i]) + 1) * 8;

drivers/gpu/drm/radeon/r600_cs.c

371

slice_tile_max = G_028060_SLICE_TILE_MAX(track->cb_color_size[i]) + 1;

drivers/gpu/drm/radeon/r600_cs.c

376

array_mode = G_0280A0_ARRAY_MODE(track->cb_color_info[i]);

drivers/gpu/drm/radeon/r600_cs.c

378

base_offset = track->cb_color_bo_mc[i] + track->cb_color_bo_offset[i];

drivers/gpu/drm/radeon/r600_cs.c

380

array_check.group_size = track->group_size;

drivers/gpu/drm/radeon/r600_cs.c

381

array_check.nbanks = track->nbanks;

drivers/gpu/drm/radeon/r600_cs.c

382

array_check.npipes = track->npipes;

drivers/gpu/drm/radeon/r600_cs.c

388

G_0280A0_ARRAY_MODE(track->cb_color_info[i]), i,

drivers/gpu/drm/radeon/r600_cs.c

389

track->cb_color_info[i]);

drivers/gpu/drm/radeon/r600_cs.c

406

G_0280A0_ARRAY_MODE(track->cb_color_info[i]), i,

drivers/gpu/drm/radeon/r600_cs.c

407

track->cb_color_info[i]);

drivers/gpu/drm/radeon/r600_cs.c

435

tmp += track->cb_color_view[i] & 0xFF;

drivers/gpu/drm/radeon/r600_cs.c

439

tmp += G_028080_SLICE_MAX(track->cb_color_view[i]) * tmp;

drivers/gpu/drm/radeon/r600_cs.c

442

if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) {

drivers/gpu/drm/radeon/r600_cs.c

454

track->cb_color_bo_offset[i], tmp,

drivers/gpu/drm/radeon/r600_cs.c

455

radeon_bo_size(track->cb_color_bo[i]),

drivers/gpu/drm/radeon/r600_cs.c

468

ib[track->cb_color_size_idx[i]] = tmp;

drivers/gpu/drm/radeon/r600_cs.c

471

switch (G_0280A0_TILE_MODE(track->cb_color_info[i])) {

drivers/gpu/drm/radeon/r600_cs.c

475

if (track->nsamples > 1) {

drivers/gpu/drm/radeon/r600_cs.c

476

uint32_t tile_max = G_028100_FMASK_TILE_MAX(track->cb_color_mask[i]);

drivers/gpu/drm/radeon/r600_cs.c

479

uint32_t bytes = track->nsamples * track->log_nsamples * 8 * (tile_max + 1);

drivers/gpu/drm/radeon/r600_cs.c

481

if (bytes + track->cb_color_frag_offset[i] >

drivers/gpu/drm/radeon/r600_cs.c

482

radeon_bo_size(track->cb_color_frag_bo[i])) {

drivers/gpu/drm/radeon/r600_cs.c

486

track->cb_color_frag_offset[i],

drivers/gpu/drm/radeon/r600_cs.c

487

radeon_bo_size(track->cb_color_frag_bo[i]));

drivers/gpu/drm/radeon/r600_cs.c

494

uint32_t block_max = G_028100_CMASK_BLOCK_MAX(track->cb_color_mask[i]);

drivers/gpu/drm/radeon/r600_cs.c

499

if (bytes + track->cb_color_tile_offset[i] >

drivers/gpu/drm/radeon/r600_cs.c

500

radeon_bo_size(track->cb_color_tile_bo[i])) {

drivers/gpu/drm/radeon/r600_cs.c

504

track->cb_color_tile_offset[i],

drivers/gpu/drm/radeon/r600_cs.c

505

radeon_bo_size(track->cb_color_tile_bo[i]));

drivers/gpu/drm/radeon/r600_cs.c

519

struct r600_cs_track *track = p->track;

drivers/gpu/drm/radeon/r600_cs.c

530

if (track->db_bo == NULL) {

drivers/gpu/drm/radeon/r600_cs.c

534

switch (G_028010_FORMAT(track->db_depth_info)) {

drivers/gpu/drm/radeon/r600_cs.c

551

G_028010_FORMAT(track->db_depth_info));

drivers/gpu/drm/radeon/r600_cs.c

554

if ((track->db_depth_size & 0xFFFFFC00) == 0xFFFFFC00) {

drivers/gpu/drm/radeon/r600_cs.c

555

if (!track->db_depth_size_idx) {

drivers/gpu/drm/radeon/r600_cs.c

559

tmp = radeon_bo_size(track->db_bo) - track->db_offset;

drivers/gpu/drm/radeon/r600_cs.c

563

track->db_depth_size, bpe, track->db_offset,

drivers/gpu/drm/radeon/r600_cs.c

564

radeon_bo_size(track->db_bo));

drivers/gpu/drm/radeon/r600_cs.c

567

ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF);

drivers/gpu/drm/radeon/r600_cs.c

570

pitch = (G_028000_PITCH_TILE_MAX(track->db_depth_size) + 1) * 8;

drivers/gpu/drm/radeon/r600_cs.c

571

slice_tile_max = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1;

drivers/gpu/drm/radeon/r600_cs.c

576

base_offset = track->db_bo_mc + track->db_offset;

drivers/gpu/drm/radeon/r600_cs.c

577

array_mode = G_028010_ARRAY_MODE(track->db_depth_info);

drivers/gpu/drm/radeon/r600_cs.c

579

array_check.group_size = track->group_size;

drivers/gpu/drm/radeon/r600_cs.c

580

array_check.nbanks = track->nbanks;

drivers/gpu/drm/radeon/r600_cs.c

581

array_check.npipes = track->npipes;

drivers/gpu/drm/radeon/r600_cs.c

582

array_check.nsamples = track->nsamples;

drivers/gpu/drm/radeon/r600_cs.c

587

G_028010_ARRAY_MODE(track->db_depth_info),

drivers/gpu/drm/radeon/r600_cs.c

588

track->db_depth_info);

drivers/gpu/drm/radeon/r600_cs.c

600

G_028010_ARRAY_MODE(track->db_depth_info),

drivers/gpu/drm/radeon/r600_cs.c

601

track->db_depth_info);

drivers/gpu/drm/radeon/r600_cs.c

621

ntiles = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1;

drivers/gpu/drm/radeon/r600_cs.c

622

nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1;

drivers/gpu/drm/radeon/r600_cs.c

623

tmp = ntiles * bpe * 64 * nviews * track->nsamples;

drivers/gpu/drm/radeon/r600_cs.c

624

if ((tmp + track->db_offset) > radeon_bo_size(track->db_bo)) {

drivers/gpu/drm/radeon/r600_cs.c

628

track->db_depth_size, ntiles, nviews, bpe, tmp + track->db_offset,

drivers/gpu/drm/radeon/r600_cs.c

629

radeon_bo_size(track->db_bo));

drivers/gpu/drm/radeon/r600_cs.c

635

if (G_028010_TILE_SURFACE_ENABLE(track->db_depth_info)) {

drivers/gpu/drm/radeon/r600_cs.c

639

if (track->htile_bo == NULL) {

drivers/gpu/drm/radeon/r600_cs.c

641

__func__, __LINE__, track->db_depth_info);

drivers/gpu/drm/radeon/r600_cs.c

644

if ((track->db_depth_size & 0xFFFFFC00) == 0xFFFFFC00) {

drivers/gpu/drm/radeon/r600_cs.c

646

__func__, __LINE__, track->db_depth_size);

drivers/gpu/drm/radeon/r600_cs.c

652

if (G_028D24_LINEAR(track->htile_surface)) {

drivers/gpu/drm/radeon/r600_cs.c

656

nby = round_up(nby, track->npipes * 8);

drivers/gpu/drm/radeon/r600_cs.c

662

switch (track->npipes) {

drivers/gpu/drm/radeon/r600_cs.c

685

__func__, __LINE__, track->npipes);

drivers/gpu/drm/radeon/r600_cs.c

693

size = roundup(nbx * nby * 4, track->npipes * (2 << 10));

drivers/gpu/drm/radeon/r600_cs.c

694

size += track->htile_offset;

drivers/gpu/drm/radeon/r600_cs.c

696

if (size > radeon_bo_size(track->htile_bo)) {

drivers/gpu/drm/radeon/r600_cs.c

698

__func__, __LINE__, radeon_bo_size(track->htile_bo),

drivers/gpu/drm/radeon/r600_cs.c

704

track->db_dirty = false;

drivers/gpu/drm/radeon/r600_cs.c

710

struct r600_cs_track *track = p->track;

drivers/gpu/drm/radeon/r600_cs.c

719

if (track->streamout_dirty && track->vgt_strmout_en) {

drivers/gpu/drm/radeon/r600_cs.c

721

if (track->vgt_strmout_buffer_en & (1 << i)) {

drivers/gpu/drm/radeon/r600_cs.c

722

if (track->vgt_strmout_bo[i]) {

drivers/gpu/drm/radeon/r600_cs.c

723

u64 offset = (u64)track->vgt_strmout_bo_offset[i] +

drivers/gpu/drm/radeon/r600_cs.c

724

(u64)track->vgt_strmout_size[i];

drivers/gpu/drm/radeon/r600_cs.c

725

if (offset > radeon_bo_size(track->vgt_strmout_bo[i])) {

drivers/gpu/drm/radeon/r600_cs.c

728

radeon_bo_size(track->vgt_strmout_bo[i]));

drivers/gpu/drm/radeon/r600_cs.c

737

track->streamout_dirty = false;

drivers/gpu/drm/radeon/r600_cs.c

740

if (track->sx_misc_kill_all_prims)

drivers/gpu/drm/radeon/r600_cs.c

746

if (track->cb_dirty) {

drivers/gpu/drm/radeon/r600_cs.c

747

tmp = track->cb_target_mask;

drivers/gpu/drm/radeon/r600_cs.c

750

if (track->is_resolve) {

drivers/gpu/drm/radeon/r600_cs.c

755

u32 format = G_0280A0_FORMAT(track->cb_color_info[i]);

drivers/gpu/drm/radeon/r600_cs.c

760

if (track->cb_color_bo[i] == NULL) {

drivers/gpu/drm/radeon/r600_cs.c

762

__func__, __LINE__, track->cb_target_mask, track->cb_shader_mask, i);

drivers/gpu/drm/radeon/r600_cs.c

771

track->cb_dirty = false;

drivers/gpu/drm/radeon/r600_cs.c

775

if (track->db_dirty &&

drivers/gpu/drm/radeon/r600_cs.c

776

G_028010_FORMAT(track->db_depth_info) != V_028010_DEPTH_INVALID &&

drivers/gpu/drm/radeon/r600_cs.c

777

(G_028800_STENCIL_ENABLE(track->db_depth_control) ||

drivers/gpu/drm/radeon/r600_cs.c

778

G_028800_Z_ENABLE(track->db_depth_control))) {

drivers/gpu/drm/radeon/r600_cs.c

973

struct r600_cs_track *track = (struct r600_cs_track *)p->track;

drivers/gpu/drm/radeon/radeon.h

1040

void *track;

drivers/gpu/drm/radeon/radeon_cs.c

453

kfree(parser->track);

drivers/hid/hid-alps.c

128

u8 track[5];

drivers/iommu/iommufd/pages.c

1437

struct iopt_pages_dmabuf_track *track;

drivers/iommu/iommufd/pages.c

1443

list_for_each_entry(track, &pages->dmabuf.tracker, elm) {

drivers/iommu/iommufd/pages.c

1444

struct iopt_area *area = track->area;

drivers/iommu/iommufd/pages.c

1446

iopt_area_unmap_domain_range(area, track->domain,

drivers/iommu/iommufd/pages.c

1568

struct iopt_pages_dmabuf_track *track;

drivers/iommu/iommufd/pages.c

1574

list_for_each_entry(track, &pages->dmabuf.tracker, elm)

drivers/iommu/iommufd/pages.c

1575

if (WARN_ON(track->domain == domain && track->area == area))

drivers/iommu/iommufd/pages.c

1578

track = kzalloc_obj(*track);

drivers/iommu/iommufd/pages.c

1579

if (!track)

drivers/iommu/iommufd/pages.c

1581

track->domain = domain;

drivers/iommu/iommufd/pages.c

1582

track->area = area;

drivers/iommu/iommufd/pages.c

1583

list_add_tail(&track->elm, &pages->dmabuf.tracker);

drivers/iommu/iommufd/pages.c

1592

struct iopt_pages_dmabuf_track *track;

drivers/iommu/iommufd/pages.c

1597

list_for_each_entry(track, &pages->dmabuf.tracker, elm) {

drivers/iommu/iommufd/pages.c

1598

if (track->domain == domain && track->area == area) {

drivers/iommu/iommufd/pages.c

1599

list_del(&track->elm);

drivers/iommu/iommufd/pages.c

1600

kfree(track);

drivers/iommu/iommufd/pages.c

1610

struct iopt_pages_dmabuf_track *track;

drivers/iommu/iommufd/pages.c

1615

list_for_each_entry(track, &pages->dmabuf.tracker, elm)

drivers/iommu/iommufd/pages.c

1616

if (WARN_ON(track->area == area))

drivers/iommu/iommufd/pages.c

1633

struct iopt_pages_dmabuf_track *track;

drivers/iommu/iommufd/pages.c

1636

list_for_each_entry_safe(track, tmp, &pages->dmabuf.tracker,

drivers/iommu/iommufd/pages.c

1638

if (track->area == area) {

drivers/iommu/iommufd/pages.c

1639

list_del(&track->elm);

drivers/iommu/iommufd/pages.c

1640

kfree(track);

drivers/net/wireless/realtek/rtw88/main.h

1121

#define RTW_DEF_RFE(chip, bb_pg, pwrlmt, track) { \

drivers/net/wireless/realtek/rtw88/main.h

1124

.pwr_track_tbl = &rtw ## chip ## _pwr_track_type ## track ## _tbl, \

drivers/net/wireless/realtek/rtw88/main.h

1127

#define RTW_DEF_RFE_EXT(chip, bb_pg, pwrlmt, track, btg) { \

drivers/net/wireless/realtek/rtw88/main.h

1130

.pwr_track_tbl = &rtw ## chip ## _pwr_track_type ## track ## _tbl, \

drivers/s390/block/dasd_eckd.c

212

sector_t *track)

drivers/s390/block/dasd_eckd.c

242

*track = cyl * private->rdc_data.trk_per_cyl + head;

drivers/s390/block/dasd_eckd.c

3132

if (format->track == to_format->track) {

drivers/s390/block/dasd_eckd.c

3210

format->track = curr_trk;

drivers/s390/block/dasd_int.h

543

sector_t track;

drivers/vfio/pci/mlx5/cmd.c

741

bool track)

drivers/vfio/pci/mlx5/cmd.c

759

migf->state == MLX5_MIGF_STATE_PRE_COPY_ERROR) && !track && !inc)

drivers/vfio/pci/mlx5/cmd.c

776

MLX5_SET(save_vhca_state_in, in, set_track, track);

drivers/vfio/pci/mlx5/cmd.c

780

async_data->stop_copy_chunk = (!track && !pre_copy_cleanup);

drivers/vfio/pci/mlx5/cmd.h

210

bool track);

drivers/vfio/pci/mlx5/main.c

333

bool track)

drivers/vfio/pci/mlx5/main.c

370

if (track)

drivers/vfio/pci/mlx5/main.c

381

bool track)

drivers/vfio/pci/mlx5/main.c

395

if (track) {

drivers/vfio/pci/mlx5/main.c

438

ret = mlx5vf_add_stop_copy_header(migf, track);

drivers/vfio/pci/mlx5/main.c

603

mlx5vf_pci_save_device_data(struct mlx5vf_pci_core_device *mvdev, bool track)

drivers/vfio/pci/mlx5/main.c

648

ret = mlx5vf_prep_stop_copy(mvdev, migf, length, full_size, track);

drivers/vfio/pci/mlx5/main.c

652

if (track) {

drivers/vfio/pci/mlx5/main.c

665

ret = mlx5vf_cmd_save_vhca_state(mvdev, migf, buf, false, track);

include/linux/fd.h

14

compat_uint_t track;

include/net/netfilter/nf_tables.h

1965

void nft_reg_track_update(struct nft_regs_track *track,

include/net/netfilter/nf_tables.h

1967

void nft_reg_track_cancel(struct nft_regs_track *track, u8 dreg, u8 len);

include/net/netfilter/nf_tables.h

1968

void __nft_reg_track_cancel(struct nft_regs_track *track, u8 dreg);

include/net/netfilter/nf_tables.h

1970

static inline bool nft_reg_track_cmp(struct nft_regs_track *track,

include/net/netfilter/nf_tables.h

1973

return track->regs[dreg].selector &&

include/net/netfilter/nf_tables.h

1974

track->regs[dreg].selector->ops == expr->ops &&

include/net/netfilter/nf_tables.h

1975

track->regs[dreg].num_reg == 0;

include/net/netfilter/nf_tables.h

428

bool nft_expr_reduce_bitwise(struct nft_regs_track *track,

include/net/netfilter/nf_tables.h

978

bool (*reduce)(struct nft_regs_track *track,

include/net/netfilter/nft_fib.h

69

bool nft_fib_reduce(struct nft_regs_track *track,

include/net/netfilter/nft_meta.h

46

bool nft_meta_get_reduce(struct nft_regs_track *track,

include/uapi/linux/fd.h

18

track, /* nr of tracks */

include/uapi/linux/fd.h

217

short track; /* current track */

include/uapi/linux/fd.h

279

unsigned char track[4];

include/uapi/linux/fd.h

382

int track;

include/uapi/linux/fd.h

74

unsigned int device,head,track;

kernel/liveupdate/kexec_handover.c

110

struct kho_mem_track track;

kernel/liveupdate/kexec_handover.c

116

.track = {

kernel/liveupdate/kexec_handover.c

117

.orders = XARRAY_INIT(kho_out.track.orders, 0),

kernel/liveupdate/kexec_handover.c

146

static void __kho_unpreserve_order(struct kho_mem_track *track, unsigned long pfn,

kernel/liveupdate/kexec_handover.c

153

physxa = xa_load(&track->orders, order);

kernel/liveupdate/kexec_handover.c

164

static void __kho_unpreserve(struct kho_mem_track *track, unsigned long pfn,

kernel/liveupdate/kexec_handover.c

172

__kho_unpreserve_order(track, pfn, order);

kernel/liveupdate/kexec_handover.c

178

static int __kho_preserve_order(struct kho_mem_track *track, unsigned long pfn,

kernel/liveupdate/kexec_handover.c

186

physxa = xa_load(&track->orders, order);

kernel/liveupdate/kexec_handover.c

195

physxa = xa_cmpxchg(&track->orders, order, NULL, new_physxa,

kernel/liveupdate/kexec_handover.c

419

xa_for_each(&kho_out->track.orders, order, physxa) {

kernel/liveupdate/kexec_handover.c

820

struct kho_mem_track *track = &kho_out.track;

kernel/liveupdate/kexec_handover.c

825

return __kho_preserve_order(track, pfn, order);

kernel/liveupdate/kexec_handover.c

841

struct kho_mem_track *track = &kho_out.track;

kernel/liveupdate/kexec_handover.c

843

__kho_unpreserve_order(track, pfn, order);

kernel/liveupdate/kexec_handover.c

859

struct kho_mem_track *track = &kho_out.track;

kernel/liveupdate/kexec_handover.c

875

err = __kho_preserve_order(track, pfn, order);

kernel/liveupdate/kexec_handover.c

885

__kho_unpreserve(track, start_pfn, failed_pfn);

kernel/liveupdate/kexec_handover.c

903

struct kho_mem_track *track = &kho_out.track;

kernel/liveupdate/kexec_handover.c

907

__kho_unpreserve(track, start_pfn, end_pfn);

kernel/liveupdate/kexec_handover.c

966

struct kho_mem_track *track = &kho_out.track;

kernel/liveupdate/kexec_handover.c

969

__kho_unpreserve(track, pfn, pfn + 1);

kernel/liveupdate/kexec_handover.c

973

__kho_unpreserve(track, pfn, pfn + (1 << order));

mm/kasan/common.c

61

void kasan_set_track(struct kasan_track *track, depot_stack_handle_t stack)

mm/kasan/common.c

67

track->cpu = cpu;

mm/kasan/common.c

68

track->timestamp = ts_nsec >> 9;

mm/kasan/common.c

70

track->pid = current->pid;

mm/kasan/common.c

71

track->stack = stack;

mm/kasan/common.c

74

void kasan_save_track(struct kasan_track *track, gfp_t flags)

mm/kasan/common.c

79

kasan_set_track(track, stack);

mm/kasan/kasan.h

301

struct kasan_track track;

mm/kasan/kasan.h

398

void kasan_set_track(struct kasan_track *track, depot_stack_handle_t stack);

mm/kasan/kasan.h

399

void kasan_save_track(struct kasan_track *track, gfp_t flags);

mm/kasan/report.c

265

static void print_track(struct kasan_track *track, const char *prefix)

mm/kasan/report.c

268

u64 ts_nsec = track->timestamp;

mm/kasan/report.c

275

prefix, track->pid, track->cpu,

mm/kasan/report.c

278

pr_err("%s by task %u:\n", prefix, track->pid);

mm/kasan/report.c

280

if (track->stack)

mm/kasan/report.c

281

stack_depot_print(track->stack);

mm/kasan/report_tags.c

74

memcpy(&info->free_track, &entry->track,

mm/kasan/report_tags.c

89

memcpy(&info->alloc_track, &entry->track,

mm/kasan/tags.c

126

old_stack = entry->track.stack;

mm/kasan/tags.c

129

kasan_set_track(&entry->track, stack);

mm/kfence/core.c

296

struct kfence_track *track =

mm/kfence/core.c

306

memcpy(track->stack_entries, stack_entries,

mm/kfence/core.c

313

num_stack_entries = stack_trace_save(track->stack_entries, KFENCE_STACK_DEPTH, 1);

mm/kfence/core.c

315

track->num_stack_entries = num_stack_entries;

mm/kfence/core.c

316

track->pid = task_pid_nr(current);

mm/kfence/core.c

317

track->cpu = raw_smp_processor_id();

mm/kfence/core.c

318

track->ts_nsec = local_clock(); /* Same source as printk timestamps. */

mm/kfence/report.c

111

const struct kfence_track *track = show_alloc ? &meta->alloc_track : &meta->free_track;

mm/kfence/report.c

112

u64 ts_sec = track->ts_nsec;

mm/kfence/report.c

114

u64 interval_nsec = local_clock() - track->ts_nsec;

mm/kfence/report.c

120

"rcu freeing" : "freed", track->pid,

mm/kfence/report.c

121

track->cpu, (unsigned long)ts_sec, rem_nsec / 1000,

mm/kfence/report.c

124

if (track->num_stack_entries) {

mm/kfence/report.c

126

int i = get_stack_skipnr(track->stack_entries, track->num_stack_entries, NULL);

mm/kfence/report.c

129

for (; i < track->num_stack_entries; i++)

mm/kfence/report.c

130

seq_con_printf(seq, " %pS\n", (void *)track->stack_entries[i]);

mm/kfence/report.c

288

static void kfence_to_kp_stack(const struct kfence_track *track, void **kp_stack)

mm/kfence/report.c

292

i = get_stack_skipnr(track->stack_entries, track->num_stack_entries, NULL);

mm/kfence/report.c

293

for (j = 0; i < track->num_stack_entries && j < KS_ADDRS_COUNT; ++i, ++j)

mm/kfence/report.c

294

kp_stack[j] = (void *)track->stack_entries[i];

mm/slub.c

1016

static struct track *get_track(struct kmem_cache *s, void *object,

mm/slub.c

1019

struct track *p;

mm/slub.c

1049

struct track *p = get_track(s, object, alloc);

mm/slub.c

1070

struct track *p;

mm/slub.c

1076

memset(p, 0, 2*sizeof(struct track));

mm/slub.c

1079

static void print_track(const char *s, struct track *t, unsigned long pr_time)

mm/slub.c

1185

off += 2 * sizeof(struct track);

mm/slub.c

1389

off += 2 * sizeof(struct track);

mm/slub.c

739

p += sizeof(struct track) * 2;

mm/slub.c

755

p += sizeof(struct track) * 2;

mm/slub.c

7744

size += 2 * sizeof(struct track);

mm/slub.c

7915

struct track __maybe_unused *trackp;

mm/slub.c

8681

const struct track *track,

mm/slub.c

8687

unsigned long age = jiffies - track->when;

mm/slub.c

8692

handle = READ_ONCE(track->handle);

mm/slub.c

8711

if ((track->addr == caddr) && (handle == chandle) &&

mm/slub.c

8715

if (track->when) {

mm/slub.c

8722

if (track->pid < l->min_pid)

mm/slub.c

8723

l->min_pid = track->pid;

mm/slub.c

8724

if (track->pid > l->max_pid)

mm/slub.c

8725

l->max_pid = track->pid;

mm/slub.c

8727

cpumask_set_cpu(track->cpu,

mm/slub.c

873

offset += sizeof(struct track) * 2;

mm/slub.c

8730

node_set(page_to_nid(virt_to_page(track)), l->nodes);

mm/slub.c

8734

if (track->addr < caddr)

mm/slub.c

8736

else if (track->addr == caddr && handle < chandle)

mm/slub.c

8738

else if (track->addr == caddr && handle == chandle &&

mm/slub.c

8757

l->addr = track->addr;

mm/slub.c

8761

l->min_pid = track->pid;

mm/slub.c

8762

l->max_pid = track->pid;

mm/slub.c

8766

cpumask_set_cpu(track->cpu, to_cpumask(l->cpus));

mm/slub.c

8768

node_set(page_to_nid(virt_to_page(track)), l->nodes);

net/bluetooth/hci_conn.c

3163

bool track = false;

net/bluetooth/hci_conn.c

3191

track = true;

net/bluetooth/hci_conn.c

3194

if (!track && !comp->tracked) {

net/bluetooth/hci_conn.c

3199

if (track) {

net/bridge/netfilter/nft_meta_bridge.c

162

static bool nft_meta_bridge_set_reduce(struct nft_regs_track *track,

net/bridge/netfilter/nft_meta_bridge.c

168

if (!track->regs[i].selector)

net/bridge/netfilter/nft_meta_bridge.c

171

if (track->regs[i].selector->ops != &nft_meta_bridge_get_ops)

net/bridge/netfilter/nft_meta_bridge.c

174

__nft_reg_track_cancel(track, i);

net/netfilter/nf_tables_api.c

10179

static bool nft_expr_reduce(struct nft_regs_track *track,

net/netfilter/nf_tables_api.c

10188

struct nft_regs_track track = {};

net/netfilter/nf_tables_api.c

10225

track.last = nft_expr_last(rule);

net/netfilter/nf_tables_api.c

10227

track.cur = expr;

net/netfilter/nf_tables_api.c

10229

if (nft_expr_reduce(&track, expr)) {

net/netfilter/nf_tables_api.c

10230

expr = track.cur;

net/netfilter/nf_tables_api.c

939

static void __nft_reg_track_clobber(struct nft_regs_track *track, u8 dreg)

net/netfilter/nf_tables_api.c

943

for (i = track->regs[dreg].num_reg; i > 0; i--)

net/netfilter/nf_tables_api.c

944

__nft_reg_track_cancel(track, dreg - i);

net/netfilter/nf_tables_api.c

947

static void __nft_reg_track_update(struct nft_regs_track *track,

net/netfilter/nf_tables_api.c

951

track->regs[dreg].selector = expr;

net/netfilter/nf_tables_api.c

952

track->regs[dreg].bitwise = NULL;

net/netfilter/nf_tables_api.c

953

track->regs[dreg].num_reg = num_reg;

net/netfilter/nf_tables_api.c

956

void nft_reg_track_update(struct nft_regs_track *track,

net/netfilter/nf_tables_api.c

962

__nft_reg_track_clobber(track, dreg);

net/netfilter/nf_tables_api.c

966

__nft_reg_track_update(track, expr, dreg, i);

net/netfilter/nf_tables_api.c

970

void nft_reg_track_cancel(struct nft_regs_track *track, u8 dreg, u8 len)

net/netfilter/nf_tables_api.c

975

__nft_reg_track_clobber(track, dreg);

net/netfilter/nf_tables_api.c

979

__nft_reg_track_cancel(track, dreg);

net/netfilter/nf_tables_api.c

983

void __nft_reg_track_cancel(struct nft_regs_track *track, u8 dreg)

net/netfilter/nf_tables_api.c

985

track->regs[dreg].selector = NULL;

net/netfilter/nf_tables_api.c

986

track->regs[dreg].bitwise = NULL;

net/netfilter/nf_tables_api.c

987

track->regs[dreg].num_reg = 0;

net/netfilter/nft_bitwise.c

394

static bool nft_bitwise_reduce(struct nft_regs_track *track,

net/netfilter/nft_bitwise.c

403

if (!track->regs[priv->sreg].selector)

net/netfilter/nft_bitwise.c

406

bitwise = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_bitwise.c

407

if (track->regs[priv->sreg].selector == track->regs[priv->dreg].selector &&

net/netfilter/nft_bitwise.c

408

track->regs[priv->sreg].num_reg == 0 &&

net/netfilter/nft_bitwise.c

409

track->regs[priv->dreg].bitwise &&

net/netfilter/nft_bitwise.c

410

track->regs[priv->dreg].bitwise->ops == expr->ops &&

net/netfilter/nft_bitwise.c

419

track->cur = expr;

net/netfilter/nft_bitwise.c

423

if (track->regs[priv->sreg].bitwise ||

net/netfilter/nft_bitwise.c

424

track->regs[priv->sreg].num_reg != 0) {

net/netfilter/nft_bitwise.c

425

nft_reg_track_cancel(track, priv->dreg, priv->len);

net/netfilter/nft_bitwise.c

430

nft_reg_track_update(track, track->regs[priv->sreg].selector,

net/netfilter/nft_bitwise.c

437

track->regs[dreg].bitwise = expr;

net/netfilter/nft_bitwise.c

551

static bool nft_bitwise_fast_reduce(struct nft_regs_track *track,

net/netfilter/nft_bitwise.c

557

if (!track->regs[priv->sreg].selector)

net/netfilter/nft_bitwise.c

560

bitwise = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_bitwise.c

561

if (track->regs[priv->sreg].selector == track->regs[priv->dreg].selector &&

net/netfilter/nft_bitwise.c

562

track->regs[priv->dreg].bitwise &&

net/netfilter/nft_bitwise.c

563

track->regs[priv->dreg].bitwise->ops == expr->ops &&

net/netfilter/nft_bitwise.c

568

track->cur = expr;

net/netfilter/nft_bitwise.c

572

if (track->regs[priv->sreg].bitwise) {

net/netfilter/nft_bitwise.c

573

nft_reg_track_cancel(track, priv->dreg, NFT_REG32_SIZE);

net/netfilter/nft_bitwise.c

578

track->regs[priv->dreg].selector =

net/netfilter/nft_bitwise.c

579

track->regs[priv->sreg].selector;

net/netfilter/nft_bitwise.c

581

track->regs[priv->dreg].bitwise = expr;

net/netfilter/nft_bitwise.c

630

bool nft_expr_reduce_bitwise(struct nft_regs_track *track,

net/netfilter/nft_bitwise.c

633

const struct nft_expr *last = track->last;

net/netfilter/nft_bitwise.c

641

return nft_bitwise_reduce(track, next);

net/netfilter/nft_bitwise.c

643

return nft_bitwise_fast_reduce(track, next);

net/netfilter/nft_byteorder.c

173

static bool nft_byteorder_reduce(struct nft_regs_track *track,

net/netfilter/nft_byteorder.c

178

nft_reg_track_cancel(track, priv->dreg, priv->len);

net/netfilter/nft_compat.c

781

static bool nft_match_reduce(struct nft_regs_track *track,

net/netfilter/nft_ct.c

703

static bool nft_ct_get_reduce(struct nft_regs_track *track,

net/netfilter/nft_ct.c

709

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_ct.c

710

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_ct.c

714

ct = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_ct.c

716

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_ct.c

720

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_ct.c

723

return nft_expr_reduce_bitwise(track, expr);

net/netfilter/nft_ct.c

763

static bool nft_ct_set_reduce(struct nft_regs_track *track,

net/netfilter/nft_ct.c

769

if (!track->regs[i].selector)

net/netfilter/nft_ct.c

772

if (track->regs[i].selector->ops != &nft_ct_get_ops)

net/netfilter/nft_ct.c

775

__nft_reg_track_cancel(track, i);

net/netfilter/nft_exthdr.c

705

static bool nft_exthdr_reduce(struct nft_regs_track *track,

net/netfilter/nft_exthdr.c

711

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_exthdr.c

712

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_exthdr.c

716

exthdr = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_exthdr.c

722

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_exthdr.c

726

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_exthdr.c

729

return nft_expr_reduce_bitwise(track, expr);

net/netfilter/nft_fib.c

165

bool nft_fib_reduce(struct nft_regs_track *track,

net/netfilter/nft_fib.c

188

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_fib.c

189

nft_reg_track_update(track, expr, priv->dreg, len);

net/netfilter/nft_fib.c

193

fib = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_fib.c

196

nft_reg_track_update(track, expr, priv->dreg, len);

net/netfilter/nft_fib.c

200

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_hash.c

169

static bool nft_jhash_reduce(struct nft_regs_track *track,

net/netfilter/nft_hash.c

174

nft_reg_track_cancel(track, priv->dreg, sizeof(u32));

net/netfilter/nft_hash.c

199

static bool nft_symhash_reduce(struct nft_regs_track *track,

net/netfilter/nft_hash.c

205

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_hash.c

206

nft_reg_track_update(track, expr, priv->dreg, sizeof(u32));

net/netfilter/nft_hash.c

210

symhash = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_hash.c

213

nft_reg_track_update(track, expr, priv->dreg, sizeof(u32));

net/netfilter/nft_hash.c

217

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_immediate.c

323

static bool nft_immediate_reduce(struct nft_regs_track *track,

net/netfilter/nft_immediate.c

329

nft_reg_track_cancel(track, priv->dreg, priv->dlen);

net/netfilter/nft_lookup.c

269

static bool nft_lookup_reduce(struct nft_regs_track *track,

net/netfilter/nft_lookup.c

275

nft_reg_track_cancel(track, priv->dreg, priv->set->dlen);

net/netfilter/nft_meta.c

745

bool nft_meta_get_reduce(struct nft_regs_track *track,

net/netfilter/nft_meta.c

751

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_meta.c

752

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_meta.c

756

meta = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_meta.c

759

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_meta.c

763

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_meta.c

766

return nft_expr_reduce_bitwise(track, expr);

net/netfilter/nft_meta.c

781

static bool nft_meta_set_reduce(struct nft_regs_track *track,

net/netfilter/nft_meta.c

787

if (!track->regs[i].selector)

net/netfilter/nft_meta.c

790

if (track->regs[i].selector->ops != &nft_meta_get_ops)

net/netfilter/nft_meta.c

793

__nft_reg_track_cancel(track, i);

net/netfilter/nft_numgen.c

181

static bool nft_ng_random_reduce(struct nft_regs_track *track,

net/netfilter/nft_numgen.c

186

nft_reg_track_cancel(track, priv->dreg, NFT_REG32_SIZE);

net/netfilter/nft_numgen.c

87

static bool nft_ng_inc_reduce(struct nft_regs_track *track,

net/netfilter/nft_numgen.c

92

nft_reg_track_cancel(track, priv->dreg, NFT_REG32_SIZE);

net/netfilter/nft_osf.c

130

static bool nft_osf_reduce(struct nft_regs_track *track,

net/netfilter/nft_osf.c

136

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_osf.c

137

nft_reg_track_update(track, expr, priv->dreg, NFT_OSF_MAXGENRELEN);

net/netfilter/nft_osf.c

141

osf = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_osf.c

144

nft_reg_track_update(track, expr, priv->dreg, NFT_OSF_MAXGENRELEN);

net/netfilter/nft_osf.c

148

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_payload.c

1015

static bool nft_payload_set_reduce(struct nft_regs_track *track,

net/netfilter/nft_payload.c

1021

if (!track->regs[i].selector)

net/netfilter/nft_payload.c

1024

if (track->regs[i].selector->ops != &nft_payload_ops &&

net/netfilter/nft_payload.c

1025

track->regs[i].selector->ops != &nft_payload_fast_ops)

net/netfilter/nft_payload.c

1028

__nft_reg_track_cancel(track, i);

net/netfilter/nft_payload.c

253

static bool nft_payload_reduce(struct nft_regs_track *track,

net/netfilter/nft_payload.c

259

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_payload.c

260

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_payload.c

264

payload = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_payload.c

268

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_payload.c

272

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_payload.c

275

return nft_expr_reduce_bitwise(track, expr);

net/netfilter/nft_socket.c

252

static bool nft_socket_reduce(struct nft_regs_track *track,

net/netfilter/nft_socket.c

258

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_socket.c

259

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_socket.c

263

socket = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_socket.c

267

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_socket.c

271

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_socket.c

274

return nft_expr_reduce_bitwise(track, expr);

net/netfilter/nft_tunnel.c

127

static bool nft_tunnel_get_reduce(struct nft_regs_track *track,

net/netfilter/nft_tunnel.c

133

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_tunnel.c

134

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_tunnel.c

138

tunnel = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_tunnel.c

142

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_tunnel.c

146

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_xfrm.c

262

static bool nft_xfrm_reduce(struct nft_regs_track *track,

net/netfilter/nft_xfrm.c

268

if (!nft_reg_track_cmp(track, expr, priv->dreg)) {

net/netfilter/nft_xfrm.c

269

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_xfrm.c

273

xfrm = nft_expr_priv(track->regs[priv->dreg].selector);

net/netfilter/nft_xfrm.c

278

nft_reg_track_update(track, expr, priv->dreg, priv->len);

net/netfilter/nft_xfrm.c

282

if (!track->regs[priv->dreg].bitwise)

net/netfilter/nft_xfrm.c

285

return nft_expr_reduce_bitwise(track, expr);

tools/perf/util/evsel.c

1173

struct record_opts *opts, bool track)

tools/perf/util/evsel.c

1309

evsel->core.attr.mmap_data = track;

tools/perf/util/evsel.c

1498

int track = evsel->tracking;

tools/perf/util/evsel.c

1568

attr->mmap_data = track;

tools/perf/util/evsel.c

1630

attr->task = track;

tools/perf/util/evsel.c

1631

attr->mmap = track;

tools/perf/util/evsel.c

1632

attr->mmap2 = track && !perf_missing_features.mmap2;

tools/perf/util/evsel.c

1633

attr->comm = track;

tools/perf/util/evsel.c

1634

attr->build_id = track && opts->build_id;

tools/perf/util/evsel.c

1635

attr->defer_output = track && callchain && callchain->defer;

tools/perf/util/evsel.c

1642

attr->ksymbol = track && !perf_missing_features.ksymbol;

tools/perf/util/evsel.c

1643

attr->bpf_event = track && !opts->no_bpf_event && !perf_missing_features.bpf;

tools/perf/util/evsel.c

1646

attr->namespaces = track;

tools/perf/util/evsel.c

1649

attr->cgroup = track && !perf_missing_features.cgroup;

tools/perf/util/evsel.c

1660

attr->context_switch = track;

tools/perf/util/evsel.c

1719

evsel__apply_config_terms(evsel, opts, track);