tegra_sflash_writel
tegra_sflash_writel(tsd, SPI_RDY | SPI_FIFO_ERROR, SPI_STATUS);
tegra_sflash_writel(tsd, x, SPI_TX_FIFO);
tegra_sflash_writel(tsd, val, SPI_DMA_CTL);
tegra_sflash_writel(tsd, val, SPI_DMA_CTL);
tegra_sflash_writel(tsd, val, SPI_DMA_CTL);
tegra_sflash_writel(tsd, command, SPI_COMMAND);
tegra_sflash_writel(tsd, tsd->def_command_reg,
tegra_sflash_writel(tsd, tsd->def_command_reg, SPI_COMMAND);
tegra_sflash_writel(tsd, tsd->def_command_reg, SPI_COMMAND);
tegra_sflash_writel(tsd, tsd->command_reg, SPI_COMMAND);