drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

131

return (CTB_H2G_BUFFER_SIZE * HZ) / SZ_2K;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

271

blob_size = 2 * CTB_DESC_SIZE + CTB_H2G_BUFFER_SIZE + CTB_G2H_BUFFER_SIZE;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

284

cmds_size = CTB_H2G_BUFFER_SIZE;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

294

cmds = blob + 2 * CTB_DESC_SIZE + CTB_H2G_BUFFER_SIZE;

drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

86

#define CTB_G2H_BUFFER_SIZE (4 * CTB_H2G_BUFFER_SIZE)

drivers/gpu/drm/xe/xe_guc_ct.c

258

#define CTB_H2G_BUFFER_DWORDS (CTB_H2G_BUFFER_SIZE / sizeof(u32))

drivers/gpu/drm/xe/xe_guc_ct.c

277

BUILD_BUG_ON(!IS_ALIGNED(CTB_H2G_BUFFER_SIZE, SZ_4));

drivers/gpu/drm/xe/xe_guc_ct.c

278

return (CTB_H2G_BUFFER_SIZE / SZ_4K) * HZ;

drivers/gpu/drm/xe/xe_guc_ct.c

283

return CTB_H2G_BUFFER_OFFSET + CTB_H2G_BUFFER_SIZE +

drivers/gpu/drm/xe/xe_guc_ct.c

443

CTB_H2G_BUFFER_SIZE);

drivers/gpu/drm/xe/xe_guc_ct.c

481

CTB_H2G_BUFFER_SIZE;

drivers/gpu/drm/xe/xe_guc_ct.c

628

CTB_H2G_BUFFER_SIZE);