drivers/gpu/drm/tegra/dc.c

1006

struct tegra_plane_state *tegra_plane_state = to_tegra_plane_state(new_state);

drivers/gpu/drm/tegra/dc.c

1049

value |= (tegra_plane_state->iova[0] >> 10) & 0x3fffff;

drivers/gpu/drm/tegra/dc.c

1053

value = (tegra_plane_state->iova[0] >> 32) & (dma_mask >> 32);

drivers/gpu/drm/tegra/dc.c

2103

const struct tegra_plane_state *old_tegra_state, *new_tegra_state;

drivers/gpu/drm/tegra/dc.c

2497

const struct tegra_plane_state *tegra_state;

drivers/gpu/drm/tegra/dc.c

2588

struct tegra_plane_state *new_tegra_state;

drivers/gpu/drm/tegra/dc.c

277

struct tegra_plane_state *state;

drivers/gpu/drm/tegra/dc.c

722

struct tegra_plane_state *plane_state = to_tegra_plane_state(new_plane_state);

drivers/gpu/drm/tegra/dc.c

831

struct tegra_plane_state *tegra_plane_state = to_tegra_plane_state(new_state);

drivers/gpu/drm/tegra/dc.c

854

window.reflect_x = tegra_plane_state->reflect_x;

drivers/gpu/drm/tegra/dc.c

855

window.reflect_y = tegra_plane_state->reflect_y;

drivers/gpu/drm/tegra/dc.c

859

window.tiling = tegra_plane_state->tiling;

drivers/gpu/drm/tegra/dc.c

860

window.format = tegra_plane_state->format;

drivers/gpu/drm/tegra/dc.c

861

window.swap = tegra_plane_state->swap;

drivers/gpu/drm/tegra/dc.c

864

window.base[i] = tegra_plane_state->iova[i] + fb->offsets[i];

drivers/gpu/drm/tegra/dc.c

970

struct tegra_plane_state *plane_state = to_tegra_plane_state(new_plane_state);

drivers/gpu/drm/tegra/hub.c

431

struct tegra_plane_state *plane_state = to_tegra_plane_state(new_plane_state);

drivers/gpu/drm/tegra/hub.c

539

struct tegra_plane_state *tegra_plane_state = to_tegra_plane_state(new_state);

drivers/gpu/drm/tegra/hub.c

565

yuv = tegra_plane_format_is_yuv(tegra_plane_state->format, &planes, &bpc);

drivers/gpu/drm/tegra/hub.c

637

if (tegra_plane_state->tiling.sector_layout == TEGRA_BO_SECTOR_LAYOUT_GPU)

drivers/gpu/drm/tegra/hub.c

641

base = tegra_plane_state->iova[0] + fb->offsets[0];

drivers/gpu/drm/tegra/hub.c

644

tegra_plane_writel(p, tegra_plane_state->format, DC_WIN_COLOR_DEPTH);

drivers/gpu/drm/tegra/hub.c

667

base = tegra_plane_state->iova[1] + fb->offsets[1];

drivers/gpu/drm/tegra/hub.c

674

base = tegra_plane_state->iova[2] + fb->offsets[2];

drivers/gpu/drm/tegra/hub.c

706

if (!tegra_plane_format_is_indexed(tegra_plane_state->format))

drivers/gpu/drm/tegra/hub.c

717

unsigned long height = tegra_plane_state->tiling.value;

drivers/gpu/drm/tegra/hub.c

720

switch (tegra_plane_state->tiling.mode) {

drivers/gpu/drm/tegra/plane.c

140

static int tegra_dc_pin(struct tegra_dc *dc, struct tegra_plane_state *state)

drivers/gpu/drm/tegra/plane.c

189

static void tegra_dc_unpin(struct tegra_dc *dc, struct tegra_plane_state *state)

drivers/gpu/drm/tegra/plane.c

227

struct tegra_plane_state *tegra_state = to_tegra_plane_state(state);

drivers/gpu/drm/tegra/plane.c

30

struct tegra_plane_state *state;

drivers/gpu/drm/tegra/plane.c

54

struct tegra_plane_state *state = to_tegra_plane_state(plane->state);

drivers/gpu/drm/tegra/plane.c

55

struct tegra_plane_state *copy;

drivers/gpu/drm/tegra/plane.c

591

struct tegra_plane_state *state)

drivers/gpu/drm/tegra/plane.c

618

struct tegra_plane_state *state)

drivers/gpu/drm/tegra/plane.c

668

struct tegra_plane_state *state)

drivers/gpu/drm/tegra/plane.c

706

struct tegra_plane_state *state)

drivers/gpu/drm/tegra/plane.c

708

struct tegra_plane_state *tegra_state;

drivers/gpu/drm/tegra/plane.c

748

struct tegra_plane_state *state)

drivers/gpu/drm/tegra/plane.h

66

static inline struct tegra_plane_state *

drivers/gpu/drm/tegra/plane.h

70

return container_of(state, struct tegra_plane_state, base);

drivers/gpu/drm/tegra/plane.h

75

static inline const struct tegra_plane_state *

drivers/gpu/drm/tegra/plane.h

95

struct tegra_plane_state *state);