drivers/gpu/drm/tegra/dc.c

1058

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);

drivers/gpu/drm/tegra/dc.c

1062

value = tegra_dc_readl(dc, DC_DISP_BLEND_CURSOR_CONTROL);

drivers/gpu/drm/tegra/dc.c

1123

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);

drivers/gpu/drm/tegra/dc.c

1185

(void)tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

1189

(void)tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

153

value = tegra_dc_readl(dc, offset);

drivers/gpu/drm/tegra/dc.c

1763

offset, tegra_dc_readl(dc, offset));

drivers/gpu/drm/tegra/dc.c

1792

value = tegra_dc_readl(dc, DC_COM_CRC_CHECKSUM);

drivers/gpu/drm/tegra/dc.c

185

return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset));

drivers/gpu/drm/tegra/dc.c

1887

value = tegra_dc_readl(dc, DC_CMD_INT_MASK);

drivers/gpu/drm/tegra/dc.c

1899

value = tegra_dc_readl(dc, DC_CMD_INT_MASK);

drivers/gpu/drm/tegra/dc.c

2067

value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND);

drivers/gpu/drm/tegra/dc.c

2229

value = tegra_dc_readl(dc, DC_CMD_DISPLAY_POWER_CONTROL);

drivers/gpu/drm/tegra/dc.c

2356

value = tegra_dc_readl(dc, DC_DISP_INTERLACE_CONTROL);

drivers/gpu/drm/tegra/dc.c

2361

value = tegra_dc_readl(dc, DC_CMD_DISPLAY_COMMAND);

drivers/gpu/drm/tegra/dc.c

2367

value = tegra_dc_readl(dc, DC_CMD_DISPLAY_POWER_CONTROL);

drivers/gpu/drm/tegra/dc.c

2422

value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

2426

value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/dc.c

2639

status = tegra_dc_readl(dc, DC_CMD_INT_STATUS);

drivers/gpu/drm/tegra/dsi.c

863

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);

drivers/gpu/drm/tegra/dsi.c

941

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);

drivers/gpu/drm/tegra/hdmi.c

1184

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);

drivers/gpu/drm/tegra/hdmi.c

1421

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);

drivers/gpu/drm/tegra/hub.c

105

return tegra_dc_readl(plane->dc, tegra_plane_offset(plane, offset));

drivers/gpu/drm/tegra/hub.c

207

value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

227

value = tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

241

return tegra_dc_readl(dc, offset) & OWNER_MASK;

drivers/gpu/drm/tegra/hub.c

270

value = tegra_dc_readl(dc, offset);

drivers/gpu/drm/tegra/hub.c

911

value = tegra_dc_readl(dc, DC_CMD_IHUB_COMMON_MISC_CTL);

drivers/gpu/drm/tegra/hub.c

915

value = tegra_dc_readl(dc, DC_DISP_IHUB_COMMON_DISPLAY_FETCH_METER);

drivers/gpu/drm/tegra/hub.c

920

tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/hub.c

922

tegra_dc_readl(dc, DC_CMD_STATE_CONTROL);

drivers/gpu/drm/tegra/rgb.c

113

value = tegra_dc_readl(rgb->dc, DC_COM_PIN_OUTPUT_POLARITY(1));

drivers/gpu/drm/tegra/sor.c

2228

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);

drivers/gpu/drm/tegra/sor.c

2465

value = tegra_dc_readl(dc, DC_DISP_DISP_SIGNAL_OPTIONS0);

drivers/gpu/drm/tegra/sor.c

2560

value = tegra_dc_readl(dc, DC_DISP_DISP_COLOR_CONTROL);

drivers/gpu/drm/tegra/sor.c

2636

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);

drivers/gpu/drm/tegra/sor.c

2646

value = tegra_dc_readl(dc, DC_DISP_CORE_SOR_SET_CONTROL(sor->index));

drivers/gpu/drm/tegra/sor.c

2697

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);

drivers/gpu/drm/tegra/sor.c

2939

value = tegra_dc_readl(dc, DC_DISP_DISP_COLOR_CONTROL);

drivers/gpu/drm/tegra/sor.c

2952

value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS);