tegra_clk_adx1
MUX("adx1", mux_plla_pllc_pllp_clkm, CLK_SOURCE_ADX1, 180, TEGRA_PERIPH_ON_APB, tegra_clk_adx1),
[tegra_clk_adx1] = { .dt_id = TEGRA124_CLK_ADX1, .present = true },