Symbol: CT2_PCI_CPQ_BASE
drivers/net/ethernet/brocade/bna/bfi_reg.h
262
#define CT2_HOSTFN_LPU0_MBOX0 (CT2_PCI_CPQ_BASE + 0x00)
drivers/net/ethernet/brocade/bna/bfi_reg.h
263
#define CT2_HOSTFN_LPU1_MBOX0 (CT2_PCI_CPQ_BASE + 0x20)
drivers/net/ethernet/brocade/bna/bfi_reg.h
264
#define CT2_LPU0_HOSTFN_MBOX0 (CT2_PCI_CPQ_BASE + 0x40)
drivers/net/ethernet/brocade/bna/bfi_reg.h
265
#define CT2_LPU1_HOSTFN_MBOX0 (CT2_PCI_CPQ_BASE + 0x60)
drivers/net/ethernet/brocade/bna/bfi_reg.h
266
#define CT2_HOSTFN_LPU0_CMD_STAT (CT2_PCI_CPQ_BASE + 0x80)
drivers/net/ethernet/brocade/bna/bfi_reg.h
267
#define CT2_HOSTFN_LPU1_CMD_STAT (CT2_PCI_CPQ_BASE + 0x84)
drivers/net/ethernet/brocade/bna/bfi_reg.h
268
#define CT2_LPU0_HOSTFN_CMD_STAT (CT2_PCI_CPQ_BASE + 0x88)
drivers/net/ethernet/brocade/bna/bfi_reg.h
269
#define CT2_LPU1_HOSTFN_CMD_STAT (CT2_PCI_CPQ_BASE + 0x8c)
drivers/net/ethernet/brocade/bna/bfi_reg.h
270
#define CT2_HOSTFN_LPU0_READ_STAT (CT2_PCI_CPQ_BASE + 0x90)
drivers/net/ethernet/brocade/bna/bfi_reg.h
271
#define CT2_HOSTFN_LPU1_READ_STAT (CT2_PCI_CPQ_BASE + 0x94)
drivers/net/ethernet/brocade/bna/bfi_reg.h
272
#define CT2_LPU0_HOSTFN_MBOX0_MSK (CT2_PCI_CPQ_BASE + 0x98)
drivers/net/ethernet/brocade/bna/bfi_reg.h
273
#define CT2_LPU1_HOSTFN_MBOX0_MSK (CT2_PCI_CPQ_BASE + 0x9C)
drivers/scsi/bfa/bfi_reg.h
263
#define CT2_HOSTFN_LPU0_MBOX0 (CT2_PCI_CPQ_BASE + 0x00)
drivers/scsi/bfa/bfi_reg.h
264
#define CT2_HOSTFN_LPU1_MBOX0 (CT2_PCI_CPQ_BASE + 0x20)
drivers/scsi/bfa/bfi_reg.h
265
#define CT2_LPU0_HOSTFN_MBOX0 (CT2_PCI_CPQ_BASE + 0x40)
drivers/scsi/bfa/bfi_reg.h
266
#define CT2_LPU1_HOSTFN_MBOX0 (CT2_PCI_CPQ_BASE + 0x60)
drivers/scsi/bfa/bfi_reg.h
267
#define CT2_HOSTFN_LPU0_CMD_STAT (CT2_PCI_CPQ_BASE + 0x80)
drivers/scsi/bfa/bfi_reg.h
268
#define CT2_HOSTFN_LPU1_CMD_STAT (CT2_PCI_CPQ_BASE + 0x84)
drivers/scsi/bfa/bfi_reg.h
269
#define CT2_LPU0_HOSTFN_CMD_STAT (CT2_PCI_CPQ_BASE + 0x88)
drivers/scsi/bfa/bfi_reg.h
270
#define CT2_LPU1_HOSTFN_CMD_STAT (CT2_PCI_CPQ_BASE + 0x8c)
drivers/scsi/bfa/bfi_reg.h
271
#define CT2_HOSTFN_LPU0_READ_STAT (CT2_PCI_CPQ_BASE + 0x90)
drivers/scsi/bfa/bfi_reg.h
272
#define CT2_HOSTFN_LPU1_READ_STAT (CT2_PCI_CPQ_BASE + 0x94)
drivers/scsi/bfa/bfi_reg.h
273
#define CT2_LPU0_HOSTFN_MBOX0_MSK (CT2_PCI_CPQ_BASE + 0x98)
drivers/scsi/bfa/bfi_reg.h
274
#define CT2_LPU1_HOSTFN_MBOX0_MSK (CT2_PCI_CPQ_BASE + 0x9C)