tdc_write
tdc_write(tdc, tdc->regs->mc_seq, reg_val);
tdc_write(tdc, tdc->regs->src, lower_32_bits(sg_req->src));
tdc_write(tdc, tdc->regs->dst, lower_32_bits(sg_req->dst));
tdc_write(tdc, tdc->regs->src_high, upper_32_bits(sg_req->src));
tdc_write(tdc, tdc->regs->dst_high, upper_32_bits(sg_req->dst));
tdc_write(tdc, tdc->regs->high_addr, src_high | dst_high);
tdc_write(tdc, tdc->regs->csre, val);
tdc_write(tdc, tdc->regs->csre, val);
tdc_write(tdc, tdc->regs->csr, csr);
tdc_write(tdc, tdc->regs->status, status);
tdc_write(tdc, tdc->regs->wcount, sg_req->wcount);
tdc_write(tdc, tdc->regs->csr,
tdc_write(tdc, tdc->regs->wcount, sg_req->wcount);
tdc_write(tdc, tdc->regs->csr, 0);
tdc_write(tdc, tdc->regs->fixed_pattern, sg_req->fixed_pattern);
tdc_write(tdc, tdc->regs->mmio_seq, sg_req->mmio_seq);
tdc_write(tdc, tdc->regs->mc_seq, sg_req->mc_seq);
tdc_write(tdc, tdc->regs->csr, sg_req->csr);
tdc_write(tdc, tdc->regs->csr,
tdc_write(tdc, tdc->regs->err_status, 0xFFFFFFFF);
tdc_write(tdc, tdc->regs->status,
tdc_write(tdc, tdc->regs->csr, csr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_CSRE,
tdc_write(tdc, TEGRA_APBDMA_CHAN_CSRE, 0);
tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, csr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, csr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_STATUS, status);
tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, ch_regs->csr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_APBSEQ, ch_regs->apb_seq);
tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, ch_regs->apb_ptr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBSEQ, ch_regs->ahb_seq);
tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, ch_regs->ahb_ptr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_WCOUNT, ch_regs->wcount);
tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR,
tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, nsg_req->ch_regs.apb_ptr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, nsg_req->ch_regs.ahb_ptr);
tdc_write(tdc, TEGRA_APBDMA_CHAN_WCOUNT,
tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR,
tdc_write(tdc, TEGRA_APBDMA_CHAN_STATUS, status);