CS_GPR
*cs++ = CS_GPR(engine, 0);
*cs++ = CS_GPR(engine, 2 * i);
*cs++ = CS_GPR(engine, n);
*cs++ = CS_GPR(engine, (n + 1) % NUM_GPR_DW);
*cs++ = CS_GPR(ce->engine, n);
*cs++ = CS_GPR(ce->engine, n);
*cs++ = i915_mmio_reg_offset(CS_GPR(i));
*cs++ = i915_mmio_reg_offset(CS_GPR(i)) + 4;
*cs++ = i915_mmio_reg_offset(CS_GPR(INC));
*cs++ = i915_mmio_reg_offset(CS_GPR(COUNT));
dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0));
dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)) - dc;
if (wait_for(intel_uncore_read(engine->uncore, CS_GPR(0)),
stream, cs, true /* save */, CS_GPR(i),
*cs++ = i915_mmio_reg_offset(CS_GPR(START_TS)) + 4;
*cs++ = i915_mmio_reg_offset(CS_GPR(START_TS));
*cs++ = i915_mmio_reg_offset(CS_GPR(NOW_TS)) + 4;
*cs++ = i915_mmio_reg_offset(CS_GPR(NOW_TS));
*cs++ = i915_mmio_reg_offset(CS_GPR(JUMP_PREDICATE));
*cs++ = i915_mmio_reg_offset(CS_GPR(DELTA_TARGET));
*cs++ = i915_mmio_reg_offset(CS_GPR(DELTA_TARGET)) + 4;
*cs++ = i915_mmio_reg_offset(CS_GPR(JUMP_PREDICATE));
stream, cs, false /* restore */, CS_GPR(i),