tda10021_readreg
reg0x3d = tda10021_readreg (state, 0x3d);
sync = tda10021_readreg (state, 0x11);
u32 _ber = tda10021_readreg(state, 0x14) |
(tda10021_readreg(state, 0x15) << 8) |
((tda10021_readreg(state, 0x16) & 0x0f) << 16);
_tda10021_writereg(state, 0x10, (tda10021_readreg(state, 0x10) & ~0xc0)
u8 config = tda10021_readreg(state, 0x02);
u8 gain = tda10021_readreg(state, 0x17);
u8 quality = ~tda10021_readreg(state, 0x18);
*ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
sync = tda10021_readreg(state, 0x11);
afc = tda10021_readreg(state, 0x19);
id = tda10021_readreg(state, 0x1a);