Symbol: tlb_op
arch/arm/include/asm/tlbflush.h
321
tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
arch/arm/include/asm/tlbflush.h
322
tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
arch/arm/include/asm/tlbflush.h
323
tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
arch/arm/include/asm/tlbflush.h
335
tlb_op(TLB_V7_UIS_FULL, "c8, c7, 0", zero);
arch/arm/include/asm/tlbflush.h
352
tlb_op(TLB_V7_UIS_FULL, "c8, c3, 0", zero);
arch/arm/include/asm/tlbflush.h
368
tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
arch/arm/include/asm/tlbflush.h
369
tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
arch/arm/include/asm/tlbflush.h
370
tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
arch/arm/include/asm/tlbflush.h
374
tlb_op(TLB_V6_U_ASID, "c8, c7, 2", asid);
arch/arm/include/asm/tlbflush.h
375
tlb_op(TLB_V6_D_ASID, "c8, c6, 2", asid);
arch/arm/include/asm/tlbflush.h
376
tlb_op(TLB_V6_I_ASID, "c8, c5, 2", asid);
arch/arm/include/asm/tlbflush.h
388
tlb_op(TLB_V7_UIS_ASID, "c8, c7, 2", asid);
arch/arm/include/asm/tlbflush.h
403
tlb_op(TLB_V7_UIS_ASID, "c8, c3, 0", 0);
arch/arm/include/asm/tlbflush.h
405
tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm));
arch/arm/include/asm/tlbflush.h
422
tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
arch/arm/include/asm/tlbflush.h
423
tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
arch/arm/include/asm/tlbflush.h
424
tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
arch/arm/include/asm/tlbflush.h
429
tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", uaddr);
arch/arm/include/asm/tlbflush.h
430
tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", uaddr);
arch/arm/include/asm/tlbflush.h
431
tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", uaddr);
arch/arm/include/asm/tlbflush.h
445
tlb_op(TLB_V7_UIS_PAGE, "c8, c7, 1", uaddr);
arch/arm/include/asm/tlbflush.h
463
tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 3", uaddr & PAGE_MASK);
arch/arm/include/asm/tlbflush.h
465
tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", uaddr);
arch/arm/include/asm/tlbflush.h
477
tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
arch/arm/include/asm/tlbflush.h
478
tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
arch/arm/include/asm/tlbflush.h
479
tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
arch/arm/include/asm/tlbflush.h
483
tlb_op(TLB_V6_U_PAGE, "c8, c7, 1", kaddr);
arch/arm/include/asm/tlbflush.h
484
tlb_op(TLB_V6_D_PAGE, "c8, c6, 1", kaddr);
arch/arm/include/asm/tlbflush.h
485
tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", kaddr);
arch/arm/include/asm/tlbflush.h
498
tlb_op(TLB_V7_UIS_PAGE, "c8, c7, 1", kaddr);
arch/arm/include/asm/tlbflush.h
516
tlb_op(TLB_V7_UIS_PAGE, "c8, c3, 1", kaddr);
arch/arm/include/asm/tlbflush.h
574
tlb_op(TLB_DCLEAN, "c7, c10, 1 @ flush_pmd", pmd);
arch/arm/include/asm/tlbflush.h
585
tlb_op(TLB_DCLEAN, "c7, c10, 1 @ flush_pmd", pmd);