arch/openrisc/lib/delay.c

24

int read_current_timer(unsigned long *timer_value)

arch/openrisc/lib/delay.c

26

*timer_value = get_cycles();

arch/sparc/kernel/sun4d_irq.c

275

unsigned int value = limit ? timer_value(limit) : 0;

arch/sparc/kernel/sun4d_irq.c

468

sbus_writel(timer_value(sparc_config.cs_period),

arch/sparc/kernel/sun4m_irq.c

354

unsigned int value = limit ? timer_value(limit) : 0;

arch/sparc/kernel/sun4m_irq.c

396

sbus_writel(timer_value(sparc_config.cs_period),

arch/x86/kvm/vmx/nested.c

3730

u64 timer_value = vmx_calc_preemption_timer_value(vcpu);

arch/x86/kvm/vmx/nested.c

3731

vmx_start_preemption_timer(vcpu, timer_value);

drivers/acpi/acpica/hwtimer.c

63

u64 timer_value;

drivers/acpi/acpica/hwtimer.c

77

status = acpi_hw_read(&timer_value, &acpi_gbl_FADT.xpm_timer_block);

drivers/acpi/acpica/hwtimer.c

82

*ticks = (u32)timer_value;

drivers/gpu/drm/radeon/sumo_smc.c

144

u32 period, unit, timer_value;

drivers/gpu/drm/radeon/sumo_smc.c

152

timer_value = (period << 16) | (unit << 4);

drivers/gpu/drm/radeon/sumo_smc.c

154

WREG32_RCU(RCU_GNB_PWR_REP_TIMER_CNTL, timer_value);

drivers/media/platform/ti/vpe/vpdma_priv.h

514

u32 timer_value;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h

5534

u8 timer_value;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h

5538

u8 timer_value;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

1085

hc_sm_p[j].timer_value);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

5929

hc_sm->timer_value = 0xFF;

drivers/net/ethernet/huawei/hinic/hinic_port.c

534

static int hinic_set_rx_lro_timer(struct hinic_dev *nic_dev, u32 timer_value)

drivers/net/ethernet/huawei/hinic/hinic_port.c

546

lro_timer.timer = timer_value;

drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c

101

lro_timer.timer = timer_value;

drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c

94

static int hinic3_set_rx_lro_timer(struct hinic3_hwdev *hwdev, u32 timer_value)

drivers/tty/serial/icom.c

116

u16 timer_value; /* 1E4-1E5 general timer value */

include/soc/amlogic/meson_ddr_pmu.h

58

unsigned long timer_value; /* Timer value in TIMER register */