drivers/gpu/drm/tilcdc/tilcdc_crtc.c

134

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

136

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

164

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

167

tilcdc_clear(dev, LCDC_DMA_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

187

tilcdc_clear(dev, LCDC_CLK_RESET_REG, LCDC_CLK_MAIN_RESET);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

367

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

404

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_PIXEL_CLOCK);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

409

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_CTRL);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

414

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_SYNC_EDGE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

419

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_HSYNC);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

424

tilcdc_clear(dev, LCDC_RASTER_TIMING_2_REG, LCDC_INVERT_VSYNC);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

429

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

463

tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

505

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

715

tilcdc_clear(dev, LCDC_DMA_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

718

tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

740

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

956

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

970

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

995

tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,