tg3_readphy
if (!tg3_readphy(tp, MII_TG3_TEST1, &tmp)) {
tg3_readphy(tp, MII_TG3_RXR_COUNTERS, &tmp);
if (!tg3_readphy(tp, MII_TG3_TEST1, &val)) {
tg3_readphy(tp, MII_TG3_RXR_COUNTERS, &val);
tg3_readphy(tp, MII_BMCR, &bmcr);
if (!tg3_readphy(tp, MII_BMCR, &bmcr) &&
err = tg3_readphy(tp, MII_TG3_MMD_ADDRESS, val);
err = tg3_readphy(tp, MII_TG3_DSP_RW_PORT, val);
err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val);
err = tg3_readphy(tp, MII_BMCR, &phy_control);
if (tg3_readphy(tp, MII_BMCR, ®) || (reg & BMCR_PDOWN))
err |= tg3_readphy(tp, MII_PHYSID1, &hw_phy_id_1);
err |= tg3_readphy(tp, MII_PHYSID2, &hw_phy_id_2);
tg3_readphy(tp, MII_BMSR, &bmsr);
if (!tg3_readphy(tp, MII_BMSR, &bmsr) &&
if (!tg3_readphy(tp, MII_BMCR, ®))
if (!tg3_readphy(tp, MII_BMSR, ®))
if (!tg3_readphy(tp, MII_ADVERTISE, ®))
if (!tg3_readphy(tp, MII_LPA, ®))
if (!tg3_readphy(tp, MII_CTRL1000, ®))
if (!tg3_readphy(tp, MII_STAT1000, ®))
if (!tg3_readphy(tp, MII_PHYADDR, ®))
if (!tg3_readphy(tp, MII_TG3_FET_TEST, &phytest)) {
if (!tg3_readphy(tp, MII_TG3_FET_SHDW_AUXSTAT2, &phy)) {
if (!tg3_readphy(tp, MII_TG3_FET_TEST, &ephy)) {
if (!tg3_readphy(tp, reg, &phy)) {
if (!tg3_readphy(tp, MII_TG3_DSP_CONTROL, &tmp32)) {
if (tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &low) ||
tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &high) ||
if (tg3_readphy(tp, MII_TG3_EXT_CTRL, ®32))
if (tg3_readphy(tp, MII_CTRL1000, &phy9_orig))
err = tg3_readphy(tp, MII_TG3_EXT_CTRL, ®32);
err = tg3_readphy(tp, MII_BMSR, &val);
err |= tg3_readphy(tp, MII_BMSR, &val);
if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &val))
if (!tg3_readphy(tp, MII_TG3_FET_TEST, &phytest)) {
if (!tg3_readphy(tp, MII_TG3_FET_SHDW_AUXMODE4, &phy)) {
if (!tg3_readphy(tp, MII_BMCR, &orig_bmcr) &&
if (tg3_readphy(tp, MII_BMSR, &tmp) ||
tg3_readphy(tp, MII_BMSR, &tmp))
err = tg3_readphy(tp, MII_BMCR, &val);
err = tg3_readphy(tp, MII_ADVERTISE, &val);
err = tg3_readphy(tp, MII_CTRL1000, &val);
err = tg3_readphy(tp, MII_ADVERTISE, &val);
if (tg3_readphy(tp, MII_ADVERTISE, lcladv))
if (tg3_readphy(tp, MII_CTRL1000, &tg3_ctrl))
if (tg3_readphy(tp, MII_STAT1000, &val))
if (tg3_readphy(tp, MII_LPA, rmtadv))
tg3_readphy(tp, MII_BMSR, &bmsr);
if (!tg3_readphy(tp, MII_BMSR, &bmsr) &&
tg3_readphy(tp, MII_BMSR, &bmsr);
if (tg3_readphy(tp, MII_BMSR, &bmsr) ||
tg3_readphy(tp, MII_BMSR, &bmsr);
if (!tg3_readphy(tp, MII_BMSR, &bmsr) &&
tg3_readphy(tp, MII_TG3_ISTAT, &val);
tg3_readphy(tp, MII_TG3_ISTAT, &val);
tg3_readphy(tp, MII_BMSR, &bmsr);
if (!tg3_readphy(tp, MII_BMSR, &bmsr) &&
tg3_readphy(tp, MII_TG3_AUX_STAT, &aux_stat);
if (!tg3_readphy(tp, MII_TG3_AUX_STAT, &aux_stat) &&
tg3_readphy(tp, MII_BMCR, &bmcr);
if (tg3_readphy(tp, MII_BMCR, &bmcr))
if (!tg3_readphy(tp, reg, &val) && (val & bit))
tg3_readphy(tp, MII_BMSR, &bmsr);
if ((!tg3_readphy(tp, MII_BMSR, &bmsr) && (bmsr & BMSR_LSTATUS)) ||
!tg3_readphy(tp, SERDES_TG3_1000X_STATUS, &sgsr) &&
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMCR, &bmcr);
err |= tg3_readphy(tp, MII_ADVERTISE, &adv);
err |= tg3_readphy(tp, MII_ADVERTISE, &adv);
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_ADVERTISE, &local_adv);
err |= tg3_readphy(tp, MII_LPA, &remote_adv);
tg3_readphy(tp, MII_BMCR, &bmcr);
tg3_readphy(tp, MII_TG3_MISC_SHDW, &phy1);
tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2);
tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2);
tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2);
tg3_readphy(tp, MII_BMCR, &bmcr);
tg3_readphy(tp, MII_CTRL1000, &val);
tg3_readphy(tp, MII_BMCR, &bmcr);
tg3_readphy(tp, MII_TG3_FET_PTEST, &val);