tg3_phydsp_write
tg3_phydsp_write(tp, MII_TG3_DSP_TAP1, phy);
tg3_phydsp_write(tp, MII_TG3_DSP_AADJ1CH0, phy);
tg3_phydsp_write(tp, MII_TG3_DSP_AADJ1CH3, phy);
tg3_phydsp_write(tp, MII_TG3_DSP_EXP75, phy);
tg3_phydsp_write(tp, MII_TG3_DSP_EXP96, phy);
tg3_phydsp_write(tp, MII_TG3_DSP_EXP97, phy);
tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, 0x0000);
tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);
tg3_phydsp_write(tp, 0x8005, 0x0800);
tg3_phydsp_write(tp, 0x8005, 0x0000);
tg3_phydsp_write(tp, MII_TG3_DSP_EXP8, val);
tg3_phydsp_write(tp, 0x201f, 0x2aaa);
tg3_phydsp_write(tp, 0x000a, 0x0323);
tg3_phydsp_write(tp, 0x000a, 0x310b);
tg3_phydsp_write(tp, 0x201f, 0x9506);
tg3_phydsp_write(tp, 0x401f, 0x14e2);
tg3_phydsp_write(tp, 0xffb, 0x4000);
tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);
tg3_phydsp_write(tp, MII_TG3_DSP_CH34TP2, val |
err |= tg3_phydsp_write(tp, 0x0012, 0x1804);
err |= tg3_phydsp_write(tp, 0x0013, 0x1204);
err |= tg3_phydsp_write(tp, 0x8006, 0x0132);
err |= tg3_phydsp_write(tp, 0x8006, 0x0232);
err |= tg3_phydsp_write(tp, 0x201f, 0x0a20);