drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

1277

struct table_info *info;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

1488

struct table_info *info;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

1691

struct table_info *info;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

1747

struct table_info *info;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

1857

struct table_info *info;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

1915

struct table_info *info;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

2015

struct table_info *info;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

3482

struct table_info *info;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

487

struct table_info *info)

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

546

struct table_info **info,

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

576

struct table_info *info;

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

825

struct table_info *info;

drivers/gpu/drm/amd/include/discovery.h

64

table_info table_list[TOTAL_TABLES];

drivers/gpu/drm/amd/include/discovery.h

77

table_info table_list[] __counted_by(num_tables);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1011

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1018

if (table_info == NULL)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1037

dep_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1047

dep_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1538

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1541

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1806

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1940

&& (table_info->cac_dtp_table->usClockStretchAmount != 0))

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2055

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2070

table_info->vddgfx_lookup_table, vv_id, &sclk)) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2073

sclk_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2102

table_info->vddc_lookup_table, vv_id, &sclk)) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2105

if (table_info == NULL)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2107

sclk_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2192

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2196

table_info->max_clock_voltage_on_dc.vddc;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2206

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2210

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2212

table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2214

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2220

table_info->vddgfx_lookup_table->entries[voltage_id].us_vdd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2226

table_info->vddc_lookup_table->entries[voltage_id].us_vdd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2233

table_info->vddc_lookup_table->entries[voltage_id].us_vdd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2239

table_info->vddc_lookup_table->entries[voltage_id].us_vdd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2379

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2384

table_info->vddgfx_lookup_table, &(data->vddcgfx_leakage));

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2389

&table_info->max_clock_voltage_on_dc.vddgfx, &(data->vddcgfx_leakage));

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2393

table_info->vddc_lookup_table, &(data->vddc_leakage));

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2398

&(data->vddc_leakage), &table_info->max_clock_voltage_on_dc.vddc);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2415

tmp_result = smu7_sort_lookup_table(hwmgr, table_info->vddgfx_lookup_table);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2419

tmp_result = smu7_sort_lookup_table(hwmgr, table_info->vddc_lookup_table);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2428

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2431

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2433

table_info->vddc_lookup_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2450

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2454

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2456

table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2472

table_info->max_clock_voltage_on_ac.sclk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2474

table_info->max_clock_voltage_on_ac.mclk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2477

table_info->max_clock_voltage_on_ac.vddc =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2480

table_info->max_clock_voltage_on_ac.vddc =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2482

table_info->max_clock_voltage_on_ac.vddci =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2485

hwmgr->dyn_state.max_clock_voltage_on_ac.sclk = table_info->max_clock_voltage_on_ac.sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2486

hwmgr->dyn_state.max_clock_voltage_on_ac.mclk = table_info->max_clock_voltage_on_ac.mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2487

hwmgr->dyn_state.max_clock_voltage_on_ac.vddc = table_info->max_clock_voltage_on_ac.vddc;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2488

hwmgr->dyn_state.max_clock_voltage_on_ac.vddci = table_info->max_clock_voltage_on_ac.vddci;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2495

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2503

if (table_info != NULL) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2504

dep_mclk_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2505

lookup_table = table_info->vddc_lookup_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2541

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2569

if (table_info == NULL)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2572

if (table_info->cac_dtp_table->usDefaultTargetOperatingTemp != 0 &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2589

table_info->cac_dtp_table->usDefaultTargetOperatingTemp = (table_info->cac_dtp_table->usDefaultTargetOperatingTemp >= 50) ?

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2590

(table_info->cac_dtp_table->usDefaultTargetOperatingTemp - 50) : 0;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2592

table_info->cac_dtp_table->usOperatingTempMaxLimit = table_info->cac_dtp_table->usDefaultTargetOperatingTemp;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2593

table_info->cac_dtp_table->usOperatingTempStep = 1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2594

table_info->cac_dtp_table->usOperatingTempHyst = 1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2603

table_info->cac_dtp_table->usOperatingTempMinLimit;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2606

table_info->cac_dtp_table->usOperatingTempMaxLimit;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2609

table_info->cac_dtp_table->usDefaultTargetOperatingTemp;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2612

table_info->cac_dtp_table->usOperatingTempStep;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

2615

table_info->cac_dtp_table->usTargetOperatingTemp;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

319

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3300

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3303

for (count = table_info->vdd_dep_on_sclk->count-1; count >= 0; count--) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3304

if (tmp_sclk >= table_info->vdd_dep_on_sclk->entries[count].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3313

*sclk_mask = table_info->vdd_dep_on_sclk->count - 1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

334

table_info->vdd_dep_on_mclk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3419

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3456

for (count = table_info->vdd_dep_on_sclk->count - 1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3459

table_info->vdd_dep_on_sclk->entries[count].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3461

table_info->vdd_dep_on_sclk->entries[count].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3467

stable_pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

354

table_info->vdd_dep_on_mclk);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

366

table_info->vddgfx_lookup_table);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3787

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

3790

table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

385

table_info->vddc_lookup_table);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5291

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5298

if (table_info == NULL || table_info->vdd_dep_on_sclk == NULL)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5300

dep_sclk_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5328

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5335

if (table_info == NULL)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5337

dep_mclk_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5373

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5376

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5394

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5397

table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5445

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5448

table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5450

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5553

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

5559

thermal_data->max = table_info->cac_dtp_table->usSoftwareShutdownTemp *

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

638

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

649

if (table_info != NULL)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

650

pcie_table = table_info->pcie_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

872

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

879

if (table_info == NULL)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

882

dep_sclk_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

883

dep_mclk_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

938

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

946

if (table_info == NULL)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

949

dep_sclk_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

950

dep_mclk_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

983

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

988

if (!table_info)

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

991

dep_sclk_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

1150

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

1158

cac_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

1240

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

1248

cac_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

463

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

469

for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

470

voltage_id = table_info->vdd_dep_on_sclk->entries[entry_id].vddInd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

475

if (entry_id >= table_info->vdd_dep_on_sclk->count) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

480

*sclk = table_info->vdd_dep_on_sclk->entries[entry_id].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1169

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1176

table_info->vdd_dep_on_mclk,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1185

table_info->vdd_dep_on_mclk,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1195

table_info->vdd_dep_on_sclk,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1258

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1261

table_info->pcie_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1306

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1312

table_info->vdd_dep_on_socclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1314

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1316

table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1318

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1320

table_info->vdd_dep_on_dcefclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1322

table_info->vdd_dep_on_pixclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1324

table_info->vdd_dep_on_dispclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1326

table_info->vdd_dep_on_phyclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1476

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1480

(uint8_t)table_info->us_ulv_voltage_offset;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1483

(uint8_t)(table_info->us_ulv_smnclk_did);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1485

(uint8_t)(table_info->us_ulv_mp1clk_did);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1487

(uint8_t)(table_info->us_ulv_gfxclk_bypass);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1613

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1626

dep_on_sclk = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1681

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1695

dep_on_soc = table_info->vdd_dep_on_socclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1726

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1754

cpu_to_le16(table_info->us_gfxclk_slew_rate);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1784

struct phm_ppt_v2_information *table_info = hwmgr->pptable;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1793

vddc_lookup_table = table_info->vddc_lookup_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1818

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1830

dep_on_mclk = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1921

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1931

dep_table = table_info->vdd_dep_on_dcefclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1934

dep_table = table_info->vdd_dep_on_dispclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1937

dep_table = table_info->vdd_dep_on_pixclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1940

dep_table = table_info->vdd_dep_on_phyclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1952

vddc = table_info->vddc_lookup_table->

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

196

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1989

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

1992

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2083

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2086

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2150

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2153

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2169

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2172

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2528

struct phm_ppt_v2_information *table_info = hwmgr->pptable;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2533

dep_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2543

dep_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2563

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2596

(uint8_t)(table_info->uc_gfx_dpm_voltage_mode);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2598

(uint8_t)(table_info->uc_soc_dpm_voltage_mode);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2600

(uint8_t)(table_info->uc_uclk_dpm_voltage_mode);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2602

(uint8_t)(table_info->uc_uvd_dpm_voltage_mode);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2604

(uint8_t)(table_info->uc_vce_dpm_voltage_mode);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2606

(uint8_t)(table_info->uc_mp0_dpm_voltage_mode);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2609

(uint8_t)(table_info->uc_dcef_dpm_voltage_mode);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

2615

table_info->us_ulv_voltage_offset) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

285

if (table_info->tdp_table->usClockStretchAmount &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3024

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3027

if (table_info->vdd_dep_on_sclk->count > VEGA10_UMD_PSTATE_GFXCLK_LEVEL &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3028

table_info->vdd_dep_on_mclk->count > VEGA10_UMD_PSTATE_MCLK_LEVEL) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3029

hwmgr->pstate_sclk = table_info->vdd_dep_on_sclk->entries[VEGA10_UMD_PSTATE_GFXCLK_LEVEL].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3030

hwmgr->pstate_mclk = table_info->vdd_dep_on_mclk->entries[VEGA10_UMD_PSTATE_MCLK_LEVEL].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3032

hwmgr->pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3033

hwmgr->pstate_mclk = table_info->vdd_dep_on_mclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3036

hwmgr->pstate_sclk_peak = table_info->vdd_dep_on_sclk->entries[table_info->vdd_dep_on_sclk->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3037

hwmgr->pstate_mclk_peak = table_info->vdd_dep_on_mclk->entries[table_info->vdd_dep_on_mclk->count - 1].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

306

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

324

vddc_lookup_table = table_info->vddc_lookup_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3288

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

331

dep_table[0] = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

332

dep_table[1] = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

333

dep_table[2] = table_info->vdd_dep_on_socclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3340

for (count = table_info->vdd_dep_on_sclk->count - 1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3343

table_info->vdd_dep_on_sclk->entries[count].clk) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3345

table_info->vdd_dep_on_sclk->entries[count].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3351

stable_pstate_sclk = table_info->vdd_dep_on_sclk->entries[0].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3628

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

3631

vdd_dep_table_on_mclk = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4098

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4100

struct phm_ppt_v1_clock_voltage_dependency_table *mclk_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4218

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4221

if (table_info->vdd_dep_on_sclk->count > VEGA10_UMD_PSTATE_GFXCLK_LEVEL &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4222

table_info->vdd_dep_on_socclk->count > VEGA10_UMD_PSTATE_SOCCLK_LEVEL &&

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4223

table_info->vdd_dep_on_mclk->count > VEGA10_UMD_PSTATE_MCLK_LEVEL) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4240

*sclk_mask = table_info->vdd_dep_on_sclk->count - 1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4241

*soc_mask = table_info->vdd_dep_on_socclk->count - 1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4242

*mclk_mask = table_info->vdd_dep_on_mclk->count - 1;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4389

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4392

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4409

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4412

table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4435

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4438

table_info->vdd_dep_on_dcefclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4451

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4454

table_info->vdd_dep_on_socclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4492

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4499

dep_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4502

dep_table = table_info->vdd_dep_on_dcefclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4505

dep_table = table_info->vdd_dep_on_dispclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4508

dep_table = table_info->vdd_dep_on_pixclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4511

dep_table = table_info->vdd_dep_on_phyclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4519

clocks->data[i].voltage_in_mv = (uint32_t)(table_info->vddc_lookup_table->

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

530

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5366

struct phm_ppt_v2_information *table_info = hwmgr->pptable;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

5367

struct phm_ppt_v1_clock_voltage_dependency_table *dep_table = table_info->vdd_dep_on_socclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

538

for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

539

voltage_id = table_info->vdd_dep_on_socclk->entries[entry_id].vddInd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

544

PP_ASSERT_WITH_CODE(entry_id < table_info->vdd_dep_on_socclk->count,

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

548

*socclk = table_info->vdd_dep_on_socclk->entries[entry_id].clk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

567

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

570

table_info->vdd_dep_on_socclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

577

table_info->vddc_lookup_table, vv_id, &sclk)) {

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

672

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

675

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

677

table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

682

case 0: vdt = table_info->vdd_dep_on_socclk; break;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

683

case 1: vdt = table_info->vdd_dep_on_sclk; break;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

684

case 2: vdt = table_info->vdd_dep_on_dcefclk; break;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

685

case 3: vdt = table_info->vdd_dep_on_pixclk; break;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

686

case 4: vdt = table_info->vdd_dep_on_dispclk; break;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

687

case 5: vdt = table_info->vdd_dep_on_phyclk; break;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

693

table_info->vddc_lookup_table->entries[voltage_id].us_vdd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

700

table_info->vddc_lookup_table->entries[voltage_id].us_vdd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

706

table_info->vddc_lookup_table->entries[voltage_id].us_vdd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

709

table_info->vddci_lookup_table->entries[voltage_id].us_vdd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

712

table_info->vddmem_lookup_table->entries[voltage_id].us_vdd;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

748

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

754

table_info->vddc_lookup_table, &(data->vddc_leakage));

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

759

&(data->vddc_leakage), &table_info->max_clock_voltage_on_dc.vddc);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

768

tmp_result = vega10_sort_lookup_table(hwmgr, table_info->vddc_lookup_table);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

777

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

780

table_info->vdd_dep_on_socclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

782

table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

794

table_info->max_clock_voltage_on_ac.sclk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

796

table_info->max_clock_voltage_on_ac.mclk =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

798

table_info->max_clock_voltage_on_ac.vddc =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

800

table_info->max_clock_voltage_on_ac.vddci =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

804

table_info->max_clock_voltage_on_ac.sclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

806

table_info->max_clock_voltage_on_ac.mclk;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

808

table_info->max_clock_voltage_on_ac.vddc;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

810

table_info->max_clock_voltage_on_ac.vddci;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1240

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1242

struct phm_tdp_table *tdp_table = table_info->tdp_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1291

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

1293

struct phm_tdp_table *tdp_table = table_info->tdp_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

787

struct phm_ppt_v2_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

801

pcie_count = table_info->vdd_dep_on_sclk->count;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1005

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1007

struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1165

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1174

vdd_dep_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1275

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1281

for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1282

if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1287

PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count,

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1301

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1318

table_info->vdd_dep_on_sclk,

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1376

table_info->vdd_dep_on_mclk,

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1424

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1427

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1463

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1466

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1559

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1562

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1635

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1639

count = (uint8_t)(table_info->vdd_dep_on_sclk->count);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1641

if (table_info->vdd_dep_on_sclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1648

count = (uint8_t)(table_info->vdd_dep_on_mclk->count);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1650

if (table_info->vdd_dep_on_mclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1668

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1671

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1673

stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1923

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1947

if (data->ulv_supported && table_info->us_ulv_voltage_offset) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2017

table_info->cac_dtp_table->usTargetOperatingTemp *

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2020

(table_info->cac_dtp_table->usTargetOperatingTemp - 1) *

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2369

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2373

if (table_info->mm_dep_table->count > 0)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2375

(uint8_t) (table_info->mm_dep_table->count - 1);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2402

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2408

(uint8_t) (table_info->mm_dep_table->count - 1);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

470

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

473

if (table_info &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

474

table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

475

table_info->cac_dtp_table->usPowerTuneDataSetID)

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

478

[table_info->cac_dtp_table->usPowerTuneDataSetID - 1];

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

492

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

494

struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

586

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

593

tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128);

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

672

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

676

struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

760

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

763

table_info->vddc_lookup_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

800

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

806

state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset;

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

807

state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

943

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

952

vdd_dep_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1041

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1043

struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1157

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1167

vdd_dep_table = table_info->vdd_dep_on_mclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1256

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1262

for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1263

if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1268

PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count,

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1283

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1294

table_info->vdd_dep_on_sclk,

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1329

table_info->vdd_dep_on_mclk,

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1371

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1374

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1421

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1424

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1526

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1529

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1621

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1625

count = (uint8_t)(table_info->vdd_dep_on_sclk->count);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1628

if (table_info->vdd_dep_on_sclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1635

count = (uint8_t)(table_info->vdd_dep_on_mclk->count);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1637

if (table_info->vdd_dep_on_mclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1654

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1657

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1661

stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1693

smu_data->smc_state_table.LdoRefSel = (table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ? table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 5;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1782

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1785

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1899

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1902

if (table_info &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1903

table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1904

table_info->cac_dtp_table->usPowerTuneDataSetID)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1907

[table_info->cac_dtp_table->usPowerTuneDataSetID - 1];

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1919

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1925

struct phm_ppt_v1_gpio_table *gpio_table = table_info->gpio_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1944

if (hw_data->ulv_supported && table_info->us_ulv_voltage_offset) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2020

table_info->cac_dtp_table->usTargetOperatingTemp *

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2023

(table_info->cac_dtp_table->usTargetOperatingTemp - 1) *

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2285

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2289

if (table_info->mm_dep_table->count > 0)

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2291

(uint8_t) (table_info->mm_dep_table->count - 1);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2318

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2324

(uint8_t) (table_info->mm_dep_table->count - 1);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2350

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2352

struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

433

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

435

struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

507

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

511

tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128);

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

587

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

591

struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

747

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

750

table_info->vddc_lookup_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

782

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

789

state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset;

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

790

state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

962

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

972

vdd_dep_table = table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1147

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1153

for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1154

if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1162

PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count,

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1582

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1585

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1589

stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1832

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1834

struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1893

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1899

tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 256);

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1977

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1981

struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2207

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2210

if (table_info &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2211

table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2212

table_info->cac_dtp_table->usPowerTuneDataSetID)

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2215

[table_info->cac_dtp_table->usPowerTuneDataSetID - 1];

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2227

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2258

if (data->ulv_supported && table_info->us_ulv_voltage_offset) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2326

table_info->cac_dtp_table->usTargetOperatingTemp *

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2329

(table_info->cac_dtp_table->usTargetOperatingTemp - 1) *

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2680

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2684

if (table_info->mm_dep_table->count > 0)

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2686

(uint8_t) (table_info->mm_dep_table->count - 1);

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2715

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2720

(uint8_t) (table_info->mm_dep_table->count - 1);

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

482

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

488

state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset;

drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

489

state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1089

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1095

for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1096

if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1101

PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count,

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1116

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1127

table_info->vdd_dep_on_sclk,

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1165

table_info->vdd_dep_on_mclk,

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1200

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1203

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1313

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1316

table_info->mm_dep_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1405

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1409

count = (uint8_t)(table_info->vdd_dep_on_sclk->count);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1412

if (table_info->vdd_dep_on_sclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1419

count = (uint8_t)(table_info->vdd_dep_on_mclk->count);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1421

if (table_info->vdd_dep_on_mclk->entries[level].clk >=

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1444

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1446

struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1493

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1496

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1498

stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1527

(table_info->cac_dtp_table->ucCKS_LDO_REFSEL != 0) ?

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1528

table_info->cac_dtp_table->ucCKS_LDO_REFSEL : 5;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1573

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1576

table_info->vdd_dep_on_sclk;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1747

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1751

tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1827

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1831

struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1923

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1929

(struct phm_ppt_v1_gpio_table *)table_info->gpio_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1952

if (hw_data->ulv_supported && table_info->us_ulv_voltage_offset) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

2023

table_info->cac_dtp_table->usTargetOperatingTemp *

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

2026

(table_info->cac_dtp_table->usTargetOperatingTemp - 1) *

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

2054

table_info->gpio_table->vrhot_triggered_sclk_dpm_index;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

334

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

338

if (table_info->mm_dep_table->count > 0)

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

340

(uint8_t) (table_info->mm_dep_table->count - 1);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

367

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

373

(uint8_t) (table_info->mm_dep_table->count - 1);

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

399

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

401

struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

434

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

437

if (table_info &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

438

table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX &&

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

439

table_info->cac_dtp_table->usPowerTuneDataSetID)

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

442

[table_info->cac_dtp_table->usPowerTuneDataSetID - 1];

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

506

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

509

table_info->vddc_lookup_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

543

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

549

state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

550

state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

816

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

824

table_info->vdd_dep_on_sclk, clock,

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

869

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

871

struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table;

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

985

struct phm_ppt_v1_information *table_info =

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

991

if (table_info->vdd_dep_on_mclk) {

drivers/gpu/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

993

table_info->vdd_dep_on_mclk, clock,

tools/objtool/arch/loongarch/special.c

26

struct table_info *orig_table;

tools/objtool/arch/loongarch/special.c

27

struct table_info *next_table;

tools/objtool/arch/loongarch/special.c

45

orig_table = malloc(sizeof(struct table_info));