CSR_RESET
_il_wr(il, CSR_RESET, 0);
_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
_il_wr(il, CSR_RESET, 0);
_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
_il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
_il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
_il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
val = iwl_read32(trans, CSR_RESET);
iwl_write32(trans, CSR_RESET,
IWL_CMD(CSR_RESET);
CSR_RESET,
iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
ret = iwl_poll_bits(trans, CSR_RESET,
iwl_read32(trans, CSR_RESET));
iwl_set_bit(trans, CSR_RESET,
iwl_write32(trans, CSR_RESET, 0);
NCR5380_write(hostdata->c400_ctl_status, CSR_RESET);
NCR5380_write(hostdata->c400_ctl_status, CSR_RESET);
NCR5380_write(hostdata->c400_ctl_status, CSR_RESET);