CSR_MSIX_FH_INT_MASK_AD
iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD,
iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD,
iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD,
iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, ~msk);
iwl_read32(trans, CSR_MSIX_FH_INT_MASK_AD));
((reg) == CSR_MSIX_FH_INT_MASK_AD ? -16 : \
IWL_CAUSE(CSR_MSIX_FH_INT_MASK_AD, MSIX_FH_INT_CAUSES_D2S_CH0_NUM),
IWL_CAUSE(CSR_MSIX_FH_INT_MASK_AD, MSIX_FH_INT_CAUSES_D2S_CH1_NUM),
IWL_CAUSE(CSR_MSIX_FH_INT_MASK_AD, MSIX_FH_INT_CAUSES_S2D),
IWL_CAUSE(CSR_MSIX_FH_INT_MASK_AD, MSIX_FH_INT_CAUSES_FH_ERR),
iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, ~val);
trans_pcie->fh_init_mask = ~iwl_read32(trans, CSR_MSIX_FH_INT_MASK_AD);