teid
union teid gmap_teid; /* address and flags of last gmap fault */
union teid teid;
teid.val = lc->trans_exc_code;
regs->int_parm_long = teid.val;
union teid *teid;
teid = (union teid *)&pgm->trans_exc_code;
teid->b61 = 1;
teid->b56 = 1;
teid->b60 = 1;
teid->b60 = 1;
teid->b61 = 1;
teid->b56 = 0;
teid->b60 = 0;
teid->b61 = 0;
teid->addr = gva >> PAGE_SHIFT;
teid->fsi = mode == GACC_STORE ? TEID_FSI_STORE : TEID_FSI_FETCH;
teid->as = psw_bits(vcpu->arch.sie_block->gpsw).as;
union teid teid = { .val = regs->int_parm_long };
get_fault_address(regs), teid.val);
switch (teid.as) {
union teid teid = { .val = regs->int_parm_long };
if (unlikely(!teid.b61)) {
if (unlikely(cpu_has_nx() && teid.b56)) {
regs->int_parm_long = (teid.addr * PAGE_SIZE) | (regs->psw.addr & PAGE_MASK);
union teid teid = { .val = regs->int_parm_long };
if (uv_has_feature(BIT_UV_FEAT_MISC) && !teid.b61) {
union teid teid = { .val = regs->int_parm_long };
if (teid.as == PSW_BITS_AS_SECONDARY)
union teid teid = { .val = regs->int_parm_long };
return teid.addr * PAGE_SIZE;
union teid teid = { .val = regs->int_parm_long };
return teid.fsi == TEID_FSI_STORE;
tc_node->l2_sched_node_id = qset.teid;
vsi->qos[tc_node->user_pri].l2_sched_node_id = qset.teid;
qset.teid = tc_node->l2_sched_node_id;
__le32 teid[];
__le32 teid[];
input->gtpu_data.teid);
__be32 teid;
qset->teid = qset_teid;
u32 teid;
teid = qset->teid;
return ice_dis_vsi_rdma_qset(vsi->port_info, 1, &teid, &q_id);
DEFINE_RAW_FLEX(struct ice_aqc_move_elem, buf, teid, 1);
__le32 teid, parent_teid;
teid = ctx->sched.vsi_node[tc]->info.node_teid;
tmp_teid = le32_to_cpu(teid);
buf->teid[0] = teid;
DEFINE_RAW_FLEX(struct ice_aqc_move_elem, buf, teid, 1);
__le32 teid, parent_teid;
teid = ctx->sched.vsi_node[tc]->info.node_teid;
tmp_teid = le32_to_cpu(teid);
buf->teid[0] = teid;
DEFINE_RAW_FLEX(struct ice_aqc_move_elem, buf, teid, 1);
__le32 teid, parent_teid;
teid = ctx->sched.vsi_node[tc]->info.node_teid;
tmp_teid = le32_to_cpu(teid);
buf->teid[0] = teid;
__be32 teid;
*first_node_teid = teid;
u32 teid = le32_to_cpu(node->info.node_teid);
status = ice_sched_remove_elems(pi->hw, node->parent, teid);
u32 teid = le32_to_cpu(vsi_node->info.node_teid);
status = ice_sched_suspend_resume_elems(hw, 1, &teid,
u32 teid = le32_to_cpu(vsi_node->info.node_teid);
status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
DEFINE_RAW_FLEX(struct ice_aqc_move_elem, buf, teid, 1);
buf->teid[0] = node->info.node_teid;
DEFINE_RAW_FLEX(struct ice_aqc_delete_elem, buf, teid, 1);
buf->teid[0] = cpu_to_le32(node_teid);
u32 teid = le32_to_cpu(node->info.node_teid);
ice_sched_remove_elems(hw, node->parent, teid);
ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
teid);
u32 teid;
teid = le32_to_cpu(buf->generic[i].node_teid);
new_node = ice_sched_find_node_by_teid(parent, teid);
ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid);
ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid);
list[i].h_u.gtp_hdr.teid = fltr->tenant_id;
memcpy(&list[i].m_u.gtp_hdr.teid,
input->gtpu_data.teid = *(__be32 *)(&rawh[GTPU_TEID_OFFSET]);
fc->bit_mask = __mlx5_mask(header_gtp, teid);
u8 teid[0x20];
u32 teid;
uint64_t teid;
MOP(t.vm, ABSOLUTE, READ, &teid, sizeof(teid), GADDR(prefix + 168));
TEST_ASSERT_EQ(teid & teid_mask, 0);