tegra_plane_writel
tegra_plane_writel(plane, blendnokey, DC_WIN_BLEND_NOKEY);
tegra_plane_writel(plane, foreground, DC_WIN_BLEND_1WIN);
tegra_plane_writel(plane, background[0], DC_WIN_BLEND_2WIN_X);
tegra_plane_writel(plane, background[1], DC_WIN_BLEND_2WIN_Y);
tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY);
tegra_plane_writel(plane, blending[0], DC_WIN_BLEND_2WIN_X);
tegra_plane_writel(plane, blending[1], DC_WIN_BLEND_2WIN_Y);
tegra_plane_writel(plane, background[2], DC_WIN_BLEND_3WIN_XY);
tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_X);
tegra_plane_writel(plane, foreground, DC_WIN_BLEND_2WIN_Y);
tegra_plane_writel(plane, foreground, DC_WIN_BLEND_3WIN_XY);
tegra_plane_writel(plane, value, DC_WIN_BLEND_MATCH_SELECT);
tegra_plane_writel(plane, value, DC_WIN_BLEND_NOMATCH_SELECT);
tegra_plane_writel(plane, value, DC_WIN_BLEND_LAYER_CONTROL);
tegra_plane_writel(plane, window->format, DC_WIN_COLOR_DEPTH);
tegra_plane_writel(plane, window->swap, DC_WIN_BYTE_SWAP);
tegra_plane_writel(plane, value, DC_WIN_POSITION);
tegra_plane_writel(plane, value, DC_WIN_SIZE);
tegra_plane_writel(plane, value, DC_WIN_PRESCALED_SIZE);
tegra_plane_writel(plane, value, DC_WIN_DDA_INC);
tegra_plane_writel(plane, h_dda, DC_WIN_H_INITIAL_DDA);
tegra_plane_writel(plane, v_dda, DC_WIN_V_INITIAL_DDA);
tegra_plane_writel(plane, 0, DC_WIN_UV_BUF_STRIDE);
tegra_plane_writel(plane, 0, DC_WIN_BUF_STRIDE);
tegra_plane_writel(plane, window->base[0], DC_WINBUF_START_ADDR);
tegra_plane_writel(plane, window->base[1], DC_WINBUF_START_ADDR_U);
tegra_plane_writel(plane, window->base[2], DC_WINBUF_START_ADDR_V);
tegra_plane_writel(plane, value, DC_WIN_LINE_STRIDE);
tegra_plane_writel(plane, window->stride[0], DC_WIN_LINE_STRIDE);
tegra_plane_writel(plane, h_offset, DC_WINBUF_ADDR_H_OFFSET);
tegra_plane_writel(plane, v_offset, DC_WINBUF_ADDR_V_OFFSET);
tegra_plane_writel(plane, value, DC_WINBUF_SURFACE_KIND);
tegra_plane_writel(plane, value, DC_WIN_BUFFER_ADDR_MODE);
tegra_plane_writel(plane, 0x00f0, DC_WIN_CSC_YOF);
tegra_plane_writel(plane, 0x012a, DC_WIN_CSC_KYRGB);
tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KUR);
tegra_plane_writel(plane, 0x0198, DC_WIN_CSC_KVR);
tegra_plane_writel(plane, 0x039b, DC_WIN_CSC_KUG);
tegra_plane_writel(plane, 0x032f, DC_WIN_CSC_KVG);
tegra_plane_writel(plane, 0x0204, DC_WIN_CSC_KUB);
tegra_plane_writel(plane, 0x0000, DC_WIN_CSC_KVB);
tegra_plane_writel(plane, 0x00008000, DC_WIN_H_FILTER_P(0));
tegra_plane_writel(plane, 0x3e087ce1, DC_WIN_H_FILTER_P(1));
tegra_plane_writel(plane, 0x3b117ac1, DC_WIN_H_FILTER_P(2));
tegra_plane_writel(plane, 0x591b73aa, DC_WIN_H_FILTER_P(3));
tegra_plane_writel(plane, 0x57256d9a, DC_WIN_H_FILTER_P(4));
tegra_plane_writel(plane, 0x552f668b, DC_WIN_H_FILTER_P(5));
tegra_plane_writel(plane, 0x73385e8b, DC_WIN_H_FILTER_P(6));
tegra_plane_writel(plane, 0x72435583, DC_WIN_H_FILTER_P(7));
tegra_plane_writel(plane, 0x714c4c8b, DC_WIN_H_FILTER_P(8));
tegra_plane_writel(plane, 0x70554393, DC_WIN_H_FILTER_P(9));
tegra_plane_writel(plane, 0x715e389b, DC_WIN_H_FILTER_P(10));
tegra_plane_writel(plane, 0x71662faa, DC_WIN_H_FILTER_P(11));
tegra_plane_writel(plane, 0x536d25ba, DC_WIN_H_FILTER_P(12));
tegra_plane_writel(plane, 0x55731bca, DC_WIN_H_FILTER_P(13));
tegra_plane_writel(plane, 0x387a11d9, DC_WIN_H_FILTER_P(14));
tegra_plane_writel(plane, 0x3c7c08f1, DC_WIN_H_FILTER_P(15));
tegra_plane_writel(plane, k, DC_WIN_V_FILTER_P(i));
tegra_plane_writel(plane, value, DC_WIN_WIN_OPTIONS);
tegra_plane_writel(p, value, DC_WIN_WIN_OPTIONS);
tegra_plane_writel(plane, value,
tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_LINEBUF_CONFIG);
tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_FETCH_METER);
tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLA);
tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB);
tegra_plane_writel(plane, value, DC_WIN_CORE_PRECOMP_WGRP_PIPE_METER);
tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_POOL_CONFIG);
tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_THREAD_GROUP);
tegra_plane_writel(p, value, DC_WIN_WIN_OPTIONS);
tegra_plane_writel(p, VCOUNTER, DC_WIN_CORE_ACT_CONTROL);
tegra_plane_writel(p, value, DC_WIN_BLEND_MATCH_SELECT);
tegra_plane_writel(p, value, DC_WIN_BLEND_NOMATCH_SELECT);
tegra_plane_writel(p, value, DC_WIN_BLEND_LAYER_CONTROL);
tegra_plane_writel(p, value, DC_WIN_WINDOWGROUP_SET_CONTROL_INPUT_SCALER);
tegra_plane_writel(p, incr, DC_WIN_SET_INPUT_SCALER_HPHASE_INCR);
tegra_plane_writel(p, init, DC_WIN_SET_INPUT_SCALER_H_START_PHASE);
tegra_plane_writel(p, incr, DC_WIN_SET_INPUT_SCALER_VPHASE_INCR);
tegra_plane_writel(p, init, DC_WIN_SET_INPUT_SCALER_V_START_PHASE);
tegra_plane_writel(p, bypass, DC_WIN_WINDOWGROUP_SET_INPUT_SCALER_USAGE);
tegra_plane_writel(p, 0, DC_WINBUF_CDE_CONTROL);
tegra_plane_writel(p, tegra_plane_state->format, DC_WIN_COLOR_DEPTH);
tegra_plane_writel(p, 0, DC_WIN_PRECOMP_WGRP_PARAMS);
tegra_plane_writel(p, value, DC_WIN_POSITION);
tegra_plane_writel(p, value, DC_WIN_SIZE);
tegra_plane_writel(p, value, DC_WIN_WIN_OPTIONS);
tegra_plane_writel(p, value, DC_WIN_CROPPED_SIZE);
tegra_plane_writel(p, upper_32_bits(base), DC_WINBUF_START_ADDR_HI);
tegra_plane_writel(p, lower_32_bits(base), DC_WINBUF_START_ADDR);
tegra_plane_writel(p, value, DC_WIN_PLANAR_STORAGE);
tegra_plane_writel(p, upper_32_bits(base), DC_WINBUF_START_ADDR_HI_U);
tegra_plane_writel(p, lower_32_bits(base), DC_WINBUF_START_ADDR_U);
tegra_plane_writel(p, upper_32_bits(base), DC_WINBUF_START_ADDR_HI_V);
tegra_plane_writel(p, lower_32_bits(base), DC_WINBUF_START_ADDR_V);
tegra_plane_writel(p, value, DC_WIN_PLANAR_STORAGE_UV);
tegra_plane_writel(p, 0, DC_WINBUF_START_ADDR_U);
tegra_plane_writel(p, 0, DC_WINBUF_START_ADDR_HI_U);
tegra_plane_writel(p, 0, DC_WINBUF_START_ADDR_V);
tegra_plane_writel(p, 0, DC_WINBUF_START_ADDR_HI_V);
tegra_plane_writel(p, 0, DC_WIN_PLANAR_STORAGE_UV);
tegra_plane_writel(p, value, DC_WIN_SET_PARAMS);
tegra_plane_writel(p, value, DC_WINBUF_CROPPED_POINT);
tegra_plane_writel(p, value, DC_WINBUF_SURFACE_KIND);
tegra_plane_writel(p, value, DC_WIN_WINDOW_SET_CONTROL);