arch/loongarch/include/asm/hw_breakpoint.h

46

#define CSR_CFG_MASK (CSR_CFG_ADDR + LOONGARCH_MAX_BRP)

arch/loongarch/kernel/hw_breakpoint.c

223

write_wb_reg(CSR_CFG_ADDR, i, 0, info->address);

arch/loongarch/kernel/hw_breakpoint.c

228

write_wb_reg(CSR_CFG_ADDR, i, 1, info->address);

arch/loongarch/kernel/hw_breakpoint.c

242

write_wb_reg(CSR_CFG_ADDR, i, 0, 0);

arch/loongarch/kernel/hw_breakpoint.c

247

write_wb_reg(CSR_CFG_ADDR, i, 1, 0);

arch/loongarch/kernel/hw_breakpoint.c

551

addr = read_wb_reg(CSR_CFG_ADDR, 0, 0);

arch/loongarch/kernel/hw_breakpoint.c

83

GEN_READ_WB_REG_CASES(CSR_CFG_ADDR, ADDR, t, val);

arch/loongarch/kernel/hw_breakpoint.c

98

GEN_WRITE_WB_REG_CASES(CSR_CFG_ADDR, ADDR, t, val);