tegra_clk_vi_10
INT8("vi", mux_pllc2_c_c3_pllp_clkm_plla1_pllc4, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_10),
[tegra_clk_vi_10] = { .dt_id = TEGRA210_CLK_VI, .present = true },