tegra_clk_vi_9
INT8("vi", mux_pllm_pllc2_c_c3_pllp_plla_pllc4, CLK_SOURCE_VI, 20, 0, tegra_clk_vi_9),
[tegra_clk_vi_9] = { .dt_id = TEGRA124_CLK_VI, .present = true },