CSR8
lance->RAP = CSR8; /* Logical Address Filter, LADRF[15:0] */
lance->RAP = CSR8 + (i << 8);
REGA( CSR8+i ) = multicast_table[i];
REGA( CSR8+i ) = multicast_table[i];
dev->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
if ((missed = ioread32(ioaddr + CSR8) & 0x1ffff)) {
ioread32(ioaddr + CSR8);
dev->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
dev->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff;
reg = rt2x00mmio_register_read(rt2x00dev, CSR8);
rt2x00mmio_register_write(rt2x00dev, CSR8, reg);
reg = rt2x00mmio_register_read(rt2x00dev, CSR8);
rt2x00mmio_register_write(rt2x00dev, CSR8, reg);
reg = rt2x00mmio_register_read(rt2x00dev, CSR8);
rt2x00mmio_register_write(rt2x00dev, CSR8, reg);
reg = rt2x00mmio_register_read(rt2x00dev, CSR8);
rt2x00mmio_register_write(rt2x00dev, CSR8, reg);
reg = rt2x00mmio_register_read(rt2x00dev, CSR8);
rt2x00mmio_register_write(rt2x00dev, CSR8, reg);
reg = rt2x00mmio_register_read(rt2x00dev, CSR8);
rt2x00mmio_register_write(rt2x00dev, CSR8, reg);
reg = rt2x00mmio_register_read(rt2x00dev, CSR8);
rt2x00mmio_register_write(rt2x00dev, CSR8, reg);
reg = rt2x00mmio_register_read(rt2x00dev, CSR8);
rt2x00mmio_register_write(rt2x00dev, CSR8, reg);