CSR0_STOP
DREG = CSR0_STOP;
DREG = CSR0_STOP; /* Temporarily stop the lance. */
ioaddr[0] = CSR0_INIT | CSR0_STOP;
if (ioaddr[0] != CSR0_STOP) {
ioaddr[0] = CSR0_STOP;
if (ioaddr[0] != CSR0_STOP) {
REGA( CSR0 ) = CSR0_STOP;
DREG = CSR0_STOP;
DREG = CSR0_STOP;
DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */
lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */
if (!(csr0 & CSR0_STOP)) /* If not stopped */
if (!(csr0 & CSR0_STOP)) /* If not stopped */
if (lp->a->read_csr(ioaddr, CSR0) & CSR0_STOP)
lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
lp->a->write_csr(ioaddr, CSR0, CSR0_STOP);
lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
lp->a->write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
ioaddr_probe[0] = CSR0_INIT | CSR0_STOP;
if(ioaddr_probe[0] != CSR0_STOP) {
REGA(CSR0) = CSR0_STOP;
REGA(CSR0) = CSR0_STOP;
DREG = CSR0_STOP;
DREG = CSR0_STOP;
REGA( CSR0 ) = CSR0_STOP;
REGA(CSR0) = CSR0_STOP;
REGA(CSR0) = CSR0_STOP;
DREG = CSR0_STOP;
DREG = CSR0_STOP; /* Temporarily stop the lance. */