ssbi
ssbi_read_bytes(struct ssbi *ssbi, u16 addr, u8 *buf, int len)
if (ssbi->controller_type == MSM_SBI_CTRL_SSBI2) {
u32 mode2 = ssbi_readl(ssbi, SSBI2_MODE2);
ssbi_writel(ssbi, mode2, SSBI2_MODE2);
ret = ssbi_wait_mask(ssbi, SSBI_STATUS_READY, 0);
ssbi_writel(ssbi, cmd, SSBI2_CMD);
ret = ssbi_wait_mask(ssbi, SSBI_STATUS_RD_READY, 0);
*buf++ = ssbi_readl(ssbi, SSBI2_RD) & 0xff;
ssbi_write_bytes(struct ssbi *ssbi, u16 addr, const u8 *buf, int len)
if (ssbi->controller_type == MSM_SBI_CTRL_SSBI2) {
u32 mode2 = ssbi_readl(ssbi, SSBI2_MODE2);
ssbi_writel(ssbi, mode2, SSBI2_MODE2);
ret = ssbi_wait_mask(ssbi, SSBI_STATUS_READY, 0);
ssbi_writel(ssbi, ((addr & 0xff) << 16) | *buf, SSBI2_CMD);
ret = ssbi_wait_mask(ssbi, 0, SSBI_STATUS_MCHN_BUSY);
ssbi_pa_transfer(struct ssbi *ssbi, u32 cmd, u8 *data)
ssbi_writel(ssbi, cmd, SSBI_PA_CMD);
rd_status = ssbi_readl(ssbi, SSBI_PA_RD_STATUS);
ssbi_pa_read_bytes(struct ssbi *ssbi, u16 addr, u8 *buf, int len)
ret = ssbi_pa_transfer(ssbi, cmd, buf);
ssbi_pa_write_bytes(struct ssbi *ssbi, u16 addr, const u8 *buf, int len)
ret = ssbi_pa_transfer(ssbi, cmd, NULL);
struct ssbi *ssbi = dev_get_drvdata(dev);
spin_lock_irqsave(&ssbi->lock, flags);
ret = ssbi->read(ssbi, addr, buf, len);
spin_unlock_irqrestore(&ssbi->lock, flags);
struct ssbi *ssbi = dev_get_drvdata(dev);
spin_lock_irqsave(&ssbi->lock, flags);
ret = ssbi->write(ssbi, addr, buf, len);
spin_unlock_irqrestore(&ssbi->lock, flags);
struct ssbi *ssbi;
ssbi = devm_kzalloc(&pdev->dev, sizeof(*ssbi), GFP_KERNEL);
if (!ssbi)
ssbi->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(ssbi->base))
return PTR_ERR(ssbi->base);
platform_set_drvdata(pdev, ssbi);
ssbi->controller_type = MSM_SBI_CTRL_SSBI;
ssbi->controller_type = MSM_SBI_CTRL_SSBI2;
ssbi->controller_type = MSM_SBI_CTRL_PMIC_ARBITER;
if (ssbi->controller_type == MSM_SBI_CTRL_PMIC_ARBITER) {
ssbi->read = ssbi_pa_read_bytes;
ssbi->write = ssbi_pa_write_bytes;
ssbi->read = ssbi_read_bytes;
ssbi->write = ssbi_write_bytes;
spin_lock_init(&ssbi->lock);
int (*read)(struct ssbi *, u16 addr, u8 *buf, int len);
int (*write)(struct ssbi *, u16 addr, const u8 *buf, int len);
static inline u32 ssbi_readl(struct ssbi *ssbi, u32 reg)
return readl(ssbi->base + reg);
static inline void ssbi_writel(struct ssbi *ssbi, u32 val, u32 reg)
writel(val, ssbi->base + reg);
static int ssbi_wait_mask(struct ssbi *ssbi, u32 set_mask, u32 clr_mask)
val = ssbi_readl(ssbi, SSBI2_STATUS);
IPQ_PIN_FUNCTION(ssbi),
PINGROUP(10, gsbi4, spdif, sata, ssbi, mdio, spmi, NA, NA, NA, NA),
PINGROUP(11, gsbi4, pcie2_prsnt, pcie1_prsnt, pcie3_prsnt, ssbi, mdio, spmi, NA, NA, NA),