CSI2SS_PLM_CTRL
regmap_write(state->phy_gpr, CSI2SS_PLM_CTRL, 0x0);
ret = regmap_read_poll_timeout(state->phy_gpr, CSI2SS_PLM_CTRL,
regmap_set_bits(state->phy_gpr, CSI2SS_PLM_CTRL,
regmap_write(state->phy_gpr, CSI2SS_PLM_CTRL, 0x0);