drivers/mtd/nand/spi/core.c

1824

ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0);

drivers/mtd/nand/spi/core.c

284

return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE,

drivers/mtd/nand/spi/core.c

291

return spinand_upd_cfg(spinand, CFG_ECC_ENABLE,

drivers/mtd/nand/spi/esmt.c

146

ret = spinand_upd_cfg(spinand, ESMT_F50L1G41LB_CFG_OTP_LOCK,

drivers/mtd/nand/spi/esmt.c

167

if (spinand_upd_cfg(spinand, ESMT_F50L1G41LB_CFG_OTP_LOCK, 0)) {

drivers/mtd/nand/spi/gigadevice.c

137

ret = spinand_upd_cfg(spinand, GD_FEATURE_NR,

drivers/mtd/nand/spi/macronix.c

148

ret = spinand_upd_cfg(spinand, MACRONIX_CFG_CONT_READ,

drivers/mtd/nand/spi/micron.c

188

ret = spinand_upd_cfg(spinand,

drivers/mtd/nand/spi/micron.c

196

if (spinand_upd_cfg(spinand, MICRON_MT29F2G01ABAGD_CFG_OTP_LOCK,

drivers/mtd/nand/spi/micron.c

259

ret = spinand_upd_cfg(spinand,

drivers/mtd/nand/spi/micron.c

281

if (spinand_upd_cfg(spinand, MICRON_MT29F2G01ABAGD_CFG_OTP_LOCK, 0)) {

drivers/mtd/nand/spi/micron.c

427

return spinand_upd_cfg(spinand, MICRON_CFG_CR, 0);

drivers/mtd/nand/spi/otp.c

118

if (spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0)) {

drivers/mtd/nand/spi/otp.c

86

ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, CFG_OTP_ENABLE);

drivers/mtd/nand/spi/winbond.c

534

return spinand_upd_cfg(spinand, WINBOND_CFG_BUF_READ, mask);

drivers/mtd/nand/spi/winbond.c

630

return spinand_upd_cfg(spinand, WINBOND_CFG_BUF_READ | WINBOND_CFG_HFREQ, mask);

drivers/mtd/nand/spi/winbond.c

797

spinand_upd_cfg(spinand, WINBOND_CFG_BUF_READ,

include/linux/mtd/spinand.h

898

int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val);