arch/mips/kernel/unaligned.c

205

case spec3_op:

arch/mips/kvm/vz.c

1245

case spec3_op:

arch/mips/kvm/vz.c

579

if (inst.spec3_format.opcode != spec3_op)

arch/mips/mm/uasm-mips.c

110

[insn_ext] = {M(spec3_op, 0, 0, 0, 0, ext_op), RS | RT | RD | RE},

arch/mips/mm/uasm-mips.c

111

[insn_ins] = {M(spec3_op, 0, 0, 0, 0, ins_op), RS | RT | RD | RE},

arch/mips/mm/uasm-mips.c

125

[insn_ldx] = {M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD},

arch/mips/mm/uasm-mips.c

132

[insn_ll] = {M6(spec3_op, 0, 0, 0, ll6_op), RS | RT | SIMM9},

arch/mips/mm/uasm-mips.c

133

[insn_lld] = {M6(spec3_op, 0, 0, 0, lld6_op), RS | RT | SIMM9},

arch/mips/mm/uasm-mips.c

138

[insn_lwx] = {M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD},

arch/mips/mm/uasm-mips.c

167

[insn_pref] = {M6(spec3_op, 0, 0, 0, pref6_op), RS | RT | SIMM9},

arch/mips/mm/uasm-mips.c

176

[insn_sc] = {M6(spec3_op, 0, 0, 0, sc6_op), RS | RT | SIMM9},

arch/mips/mm/uasm-mips.c

177

[insn_scd] = {M6(spec3_op, 0, 0, 0, scd6_op), RS | RT | SIMM9},

arch/mips/mm/uasm-mips.c

202

[insn_wsbh] = {M(spec3_op, 0, 0, 0, wsbh_op, bshfl_op), RT | RD},

arch/mips/mm/uasm-mips.c

205

[insn_yield] = {M(spec3_op, 0, 0, 0, 0, yield_op), RS | RD},

arch/mips/mm/uasm-mips.c

70

[insn_cache] = {M6(spec3_op, 0, 0, 0, cache6_op), RS | RT | SIMM9},

arch/mips/mm/uasm-mips.c

82

[insn_dins] = {M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE},

arch/mips/mm/uasm-mips.c

83

[insn_dinsm] = {M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE},

arch/mips/mm/uasm-mips.c

84

[insn_dinsu] = {M(spec3_op, 0, 0, 0, 0, dinsu_op), RS | RT | RD | RE},

arch/mips/mm/uasm-mips.c

97

[insn_dsbh] = {M(spec3_op, 0, 0, 0, dsbh_op, dbshfl_op), RT | RD},

arch/mips/mm/uasm-mips.c

98

[insn_dshd] = {M(spec3_op, 0, 0, 0, dshd_op, dbshfl_op), RT | RD},