arch/sparc/kernel/perf_event.c

1022

if (sparc_pmu->num_pcrs == 1) {

arch/sparc/kernel/perf_event.c

1043

for (i = 0; i < sparc_pmu->num_pcrs; i++)

arch/sparc/kernel/perf_event.c

1058

for (i = 0; i < sparc_pmu->num_pcrs; i++) {

arch/sparc/kernel/perf_event.c

1061

val &= ~(sparc_pmu->user_bit | sparc_pmu->priv_bit |

arch/sparc/kernel/perf_event.c

1062

sparc_pmu->hv_bit | sparc_pmu->irq_bit);

arch/sparc/kernel/perf_event.c

1167

for (i = 0; i < sparc_pmu->num_pcrs; i++)

arch/sparc/kernel/perf_event.c

1201

if (!sparc_pmu->cache_map)

arch/sparc/kernel/perf_event.c

1216

pmap = &((*sparc_pmu->cache_map)[cache_type][cache_op][cache_result]);

arch/sparc/kernel/perf_event.c

1254

if (n_ev > sparc_pmu->max_hw_events)

arch/sparc/kernel/perf_event.c

1257

if (!(sparc_pmu->flags & SPARC_PMU_HAS_CONFLICTS)) {

arch/sparc/kernel/perf_event.c

1320

if (!(sparc_pmu->flags & SPARC_PMU_ALL_EXCLUDES_SAME))

arch/sparc/kernel/perf_event.c

1381

if (n0 >= sparc_pmu->max_hw_events)

arch/sparc/kernel/perf_event.c

1434

if (attr->config >= sparc_pmu->max_events)

arch/sparc/kernel/perf_event.c

1436

pmap = sparc_pmu->event_map(attr->config);

arch/sparc/kernel/perf_event.c

1465

hwc->config_base = sparc_pmu->irq_bit;

arch/sparc/kernel/perf_event.c

1467

hwc->config_base |= sparc_pmu->user_bit;

arch/sparc/kernel/perf_event.c

1469

hwc->config_base |= sparc_pmu->priv_bit;

arch/sparc/kernel/perf_event.c

1471

hwc->config_base |= sparc_pmu->hv_bit;

arch/sparc/kernel/perf_event.c

1476

sparc_pmu->max_hw_events - 1,

arch/sparc/kernel/perf_event.c

1555

if (!sparc_pmu)

arch/sparc/kernel/perf_event.c

1595

if (!sparc_pmu)

arch/sparc/kernel/perf_event.c

1603

for (i = 0; i < sparc_pmu->num_pcrs; i++)

arch/sparc/kernel/perf_event.c

1606

for (i = 0; i < sparc_pmu->num_pic_regs; i++)

arch/sparc/kernel/perf_event.c

1648

if (sparc_pmu->irq_bit &&

arch/sparc/kernel/perf_event.c

1649

sparc_pmu->num_pcrs == 1)

arch/sparc/kernel/perf_event.c

1658

if (sparc_pmu->irq_bit &&

arch/sparc/kernel/perf_event.c

1659

sparc_pmu->num_pcrs > 1)

arch/sparc/kernel/perf_event.c

1691

sparc_pmu = &ultra3_pmu;

arch/sparc/kernel/perf_event.c

1695

sparc_pmu = &niagara1_pmu;

arch/sparc/kernel/perf_event.c

1700

sparc_pmu = &niagara2_pmu;

arch/sparc/kernel/perf_event.c

1705

sparc_pmu = &niagara4_pmu;

arch/sparc/kernel/perf_event.c

1709

sparc_pmu = &sparc_m7_pmu;

arch/sparc/kernel/perf_event.c

321

static const struct sparc_pmu ultra3_pmu = {

arch/sparc/kernel/perf_event.c

459

static const struct sparc_pmu niagara1_pmu = {

arch/sparc/kernel/perf_event.c

594

static const struct sparc_pmu niagara2_pmu = {

arch/sparc/kernel/perf_event.c

751

static const struct sparc_pmu niagara4_pmu = {

arch/sparc/kernel/perf_event.c

781

static const struct sparc_pmu sparc_m7_pmu = {

arch/sparc/kernel/perf_event.c

804

static const struct sparc_pmu *sparc_pmu __read_mostly;

arch/sparc/kernel/perf_event.c

809

event_id <<= sparc_pmu->upper_shift;

arch/sparc/kernel/perf_event.c

811

event_id <<= sparc_pmu->lower_shift;

arch/sparc/kernel/perf_event.c

817

return event_encoding(sparc_pmu->event_mask, idx);

arch/sparc/kernel/perf_event.c

823

sparc_pmu->upper_nop :

arch/sparc/kernel/perf_event.c

824

sparc_pmu->lower_nop, idx);

arch/sparc/kernel/perf_event.c

832

if (sparc_pmu->num_pcrs > 1)

arch/sparc/kernel/perf_event.c

852

if (sparc_pmu->num_pcrs > 1)

arch/sparc/kernel/perf_event.c

872

new_raw_count = sparc_pmu->read_pmc(idx);

arch/sparc/kernel/perf_event.c

916

sparc_pmu->write_pmc(idx, (u64)(-left) & 0xffffffff);