stv0299_writeregI
return stv0299_writeregI (state, 0x31, 0x1f);
return stv0299_writeregI (state, 0x31, 0x01);
return stv0299_writeregI (state, 0x31, 0x02);
return stv0299_writeregI (state, 0x31, 0x04);
return stv0299_writeregI (state, 0x31, 0x08);
return stv0299_writeregI (state, 0x31, 0x10);
if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x6)) /* DiSEqC mode */
if (stv0299_writeregI (state, 0x09, m->msg[i]))
if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x2)) /* burst mode */
if (stv0299_writeregI (state, 0x09, burst == SEC_MINI_A ? 0x00 : 0xff))
if (stv0299_writeregI (state, 0x08, val))
return stv0299_writeregI (state, 0x08, val | 0x3);
return stv0299_writeregI (state, 0x08, (val & ~0x3) | 0x02);
stv0299_writeregI(state, 0x08, reg0x08);
return stv0299_writeregI(state, 0x0c, reg0x0c);
stv0299_writeregI (state, 0x08, (reg0x08 & 0x3f) | (state->config->lock_output << 6));
stv0299_writeregI (state, 0x0c, reg0x0c | 0x50); /* set LNB to 18V */
stv0299_writeregI (state, 0x0c, reg0x0c | (last ? lv_mask : 0x50));
stv0299_writeregI(state, 0x02, 0x30 | state->mcr_reg);
stv0299_writeregI(state, reg, val);
stv0299_writeregI(state, 0x0c, (stv0299_readreg(state, 0x0c) & 0xfe) | invval);
stv0299_writeregI(state, 0x22, 0x00);
stv0299_writeregI(state, 0x23, 0x00);
stv0299_writeregI(state, 0x02, 0xb0 | state->mcr_reg);
stv0299_writeregI(state, 0x05, 0xb5);
stv0299_writeregI(state, 0x05, 0x35);
stv0299_writeregI(state, 0x02, 0x30); /* standby off */
return stv0299_writeregI(state, buf[0], buf[1]);