stop_bit
if (clk_info->div.stop_bit != -1)
reg &= ~BIT(clk_info->div.stop_bit);
s8 stop_bit;
iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
val |= stop_bit;
val |= stop_bit;
#define DMAC_CHANNEL_STATE_SET(start_bit, stop_bit) \
(((start_bit) ? 2 : 0) | ((stop_bit) ? 1 : 0))
qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit),
BIT(ab_ahb->stop_bit));
qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit), 0);
&ab_ahb->stop_bit);
u32 stop_bit;
BIT(q6v5->stop_bit), BIT(q6v5->stop_bit));
qcom_smem_state_update_bits(q6v5->state, BIT(q6v5->stop_bit), 0);
BIT(q6v5->stop_bit), BIT(q6v5->stop_bit));
q6v5->state = devm_qcom_smem_state_get(&pdev->dev, "stop", &q6v5->stop_bit);
unsigned stop_bit;
BIT(wcnss->stop_bit),
BIT(wcnss->stop_bit));
BIT(wcnss->stop_bit),
&wcnss->stop_bit);
unsigned stop_bit;