drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

239

addr0 = soc_v1_0_normalize_xcc_reg_offset(addr0);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

240

addr1 = soc_v1_0_normalize_xcc_reg_offset(addr1);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3549

reg = soc_v1_0_normalize_xcc_reg_offset(reg);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

3569

reg = soc_v1_0_normalize_xcc_reg_offset(reg);

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c

540

uint32_t normalized_reg = soc_v1_0_normalize_xcc_reg_offset(reg);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1232

amdgpu_ring_write(ring, soc_v1_0_normalize_xcc_reg_offset(reg) << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1241

amdgpu_ring_write(ring, soc_v1_0_normalize_xcc_reg_offset(reg) << 2);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

892

uint32_t normalized_reg = soc_v1_0_normalize_xcc_reg_offset(reg);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

905

uint32_t normalized_reg = soc_v1_0_normalize_xcc_reg_offset(reg);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

908

return soc_v1_0_normalize_xcc_reg_offset(reg);

drivers/gpu/drm/amd/amdgpu/soc_v1_0.h

35

uint32_t soc_v1_0_normalize_xcc_reg_offset(uint32_t reg);