stm32_adc_set_bits
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS);
stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, lincalrdyw_mask);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADCAL);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, msk);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADCAL);
stm32_adc_set_bits(adc, adc->cfg->regs->ier_eoc.reg,
stm32_adc_set_bits(adc, adc->cfg->regs->ier_ovr.reg,
stm32_adc_set_bits(adc, adc->cfg->regs->or_vddcore.reg,
stm32_adc_set_bits(adc, adc->cfg->regs->or_vddcpu.reg,
stm32_adc_set_bits(adc, adc->cfg->regs->or_vddq_ddr.reg,
stm32_adc_set_bits(adc, STM32F4_ADC_CR1, STM32F4_SCAN);
stm32_adc_set_bits(adc, STM32F4_ADC_CR2,
stm32_adc_set_bits(adc, STM32F4_ADC_CR2, STM32F4_EOCS | STM32F4_ADON);
stm32_adc_set_bits(adc, STM32F4_ADC_CR2, STM32F4_SWSTART);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADSTART);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADSTP);
stm32_adc_set_bits(adc, adc->cfg->regs->isr_eoc.reg, msk);
stm32_adc_set_bits(adc, STM32H7_ADC_CFGR,
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADSTART);
stm32_adc_set_bits(adc, STM32H7_ADC_CFGR2, bits & msk);
stm32_adc_set_bits(adc, STM32H7_ADC_CFGR2, bits & msk);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADVREGEN);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_BOOST);
stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD);