CS42L52_LIMITER_CTL2
{ CS42L52_LIMITER_CTL2, 0x7F }, /* r28 Limit Ctl 2 Release Rate */
CS42L52_LIMITER_CTL2, 0, 63, 0, limiter_tlv),
SOC_SINGLE("Limiter Switch", CS42L52_LIMITER_CTL2, 7, 1, 0),