ssb_write32
ssb_write32(bp->sdev, reg, val);
ssb_write32(dev->sdev, offset, value);
ssb_write32(gpiodev, B43_GPIO_CONTROL,
ssb_write32(gpiodev, B43_GPIO_CONTROL, 0);
ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
ssb_write32(dev->dev->sdev, SSB_IMCFGLO, tmp);
ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
ssb_write32(dev->dev, offset, value);
ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
ssb_write32(dev->dev, SSB_TMSLOW, value32);
ssb_write32(sdev, SSB_TMSLOW, tmslow);
ssb_write32(sdev, SSB_TMSLOW, tmslow);
ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
ssb_write32(extif->dev, offset, value);
ssb_write32(sdev, SSB_TMSLOW, tmslow);
ssb_write32(dev->dev, offset, value);
ssb_write32(dev, SSB_INTVEC, 0);
ssb_write32(dev, SSB_IPSFLAG,
ssb_write32(mdev, SSB_INTVEC, (~(1 << irqflag) & ssb_read32(mdev, SSB_INTVEC)));
ssb_write32(mdev, SSB_INTVEC, ((1 << irqflag) | ssb_read32(mdev, SSB_INTVEC)));
ssb_write32(mdev, SSB_IPSFLAG, irqflag);
ssb_write32(mcore->dev, offset, value);
ssb_write32(pc->dev, offset, value);
ssb_write32(pdev, SSB_IMCFGLO, tmp);
ssb_write32(pdev, SSB_INTVEC, 0);
ssb_write32(pdev, SSB_INTVEC, intvec);
ssb_write32(dev, SSB_TMSLOW,
ssb_write32(dev, SSB_TMSHIGH, 0);
ssb_write32(dev, SSB_IMSTATE, val);
ssb_write32(dev, SSB_TMSLOW,
ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
ssb_write32(dev, SSB_IMSTATE, val);
ssb_write32(dev, SSB_TMSLOW,
ssb_write32(dev, SSB_IMSTATE, val);
ssb_write32(dev, SSB_TMSLOW,
ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
ssb_write32(dev, 0x894, 0x00fe00fe);
ssb_write32(dev, 0x89c, ssb_read32(dev, 0x89c) | 0x1);
ssb_write32(dev, 0x200, 0x7ff);
ssb_write32(dev, 0x400, ssb_read32(dev, 0x400) & ~8);
ssb_write32(dev, 0x304, ssb_read32(dev, 0x304) & ~0x100);
#define chipco_write32(cc, offset, val) ssb_write32((cc)->dev, offset, val)