sram_write
sram_write(lanai, pattern, offset);
sram_write(adapter, addr, &tmp2, 1);
sram_write(adapter, addr + 4, &tmp1, 1);
sram_write(adapter, addr, &tmp2, 1);
sram_write(adapter, addr + 4, &tmp1, 1);
part->battr.write = sram_write;
sram_write(tp, SRAM_GREEN_CFG, data);
sram_write(tp, 0x8045, 0); /* 10M abiq&ldvbias */
sram_write(tp, 0x804d, 0x1222); /* 100M short abiq&ldvbias */
sram_write(tp, 0x805d, 0x0022); /* 1000M short abiq&ldvbias */
sram_write(tp, 0x8045, 0x2444); /* 10M abiq&ldvbias */
sram_write(tp, 0x804d, 0x2444); /* 100M short abiq&ldvbias */
sram_write(tp, 0x805d, 0x2444); /* 1000M short abiq&ldvbias */
sram_write(tp, key_addr, patch_key);
sram_write(tp, SRAM_PHY_LOCK, PHY_PATCH_LOCK);
sram_write(tp, 0x0000, 0x0000);
sram_write(tp, key_addr, 0x0000);
sram_write(tp, ver_addr, ver);
sram_write(tp, __le16_to_cpu(phy->pre_set[i].addr),
sram_write(tp, __le16_to_cpu(phy->bp[i].addr), __le16_to_cpu(phy->bp[i].data));
sram_write(tp, __le16_to_cpu(phy->bp_en.addr), __le16_to_cpu(phy->bp_en.data));
sram_write(tp, mode_reg, __le16_to_cpu(phy->mode_pre));
sram_write(tp, __le16_to_cpu(phy->ba_reg),
sram_write(tp, __le16_to_cpu(phy->patch_en_addr),
sram_write(tp, bp_index, __le16_to_cpu(phy->bp[i]));
sram_write(tp, mode_reg, __le16_to_cpu(phy->mode_post));
sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
sram_write(tp, SRAM_LPF_CFG, 0xf70f);
sram_write(tp, SRAM_10M_AMP1, 0x00af);
sram_write(tp, SRAM_10M_AMP2, 0x0208);
sram_write(tp, SRAM_GREEN_CFG, data);
sram_write(tp, 0x80ea, data);
sram_write(tp, 0x80eb, data);
sram_write(tp, 0x80f8, data);
sram_write(tp, 0x80f1, data);
sram_write(tp, 0x80fe, data);
sram_write(tp, 0x8102, data);
sram_write(tp, 0x8015, data);
sram_write(tp, 0x8100, data);
sram_write(tp, 0x8014, data);
sram_write(tp, 0x8016, data);
sram_write(tp, 0x80dc, data);
sram_write(tp, 0x80df, data);
sram_write(tp, 0x80e1, data);
sram_write(tp, 0x819f, 0xddb6);
sram_write(tp, 0x8257, 0x020f); /* XG PLL */
sram_write(tp, 0x80ea, 0x7843); /* GIGA Master */
sram_write(tp, 0x81a2, data);
sram_write(tp, 0x8fff, data);
sram_write(tp, 0x816c, 0xc4a0);
sram_write(tp, 0x8170, 0xc4a0);
sram_write(tp, 0x8174, 0x04a0);
sram_write(tp, 0x8178, 0x04a0);
sram_write(tp, 0x817c, 0x0719);
sram_write(tp, 0x8ff4, 0x0400);
sram_write(tp, 0x8ff1, 0x0404);
sram_write(tp, 0x8217, data);
sram_write(tp, 0x821a, data);
sram_write(tp, 0x80da, 0x0403);
sram_write(tp, 0x80dc, data);
sram_write(tp, 0x80b3, 0x0384);
sram_write(tp, 0x80b7, 0x2007);
sram_write(tp, 0x80ba, data);
sram_write(tp, 0x80b5, 0xf009);
sram_write(tp, 0x80bd, data);
sram_write(tp, 0x80c7, 0xf083);
sram_write(tp, 0x80dd, 0x03f0);
sram_write(tp, 0x80df, data);
sram_write(tp, 0x80cb, 0x2007);
sram_write(tp, 0x80ce, data);
sram_write(tp, 0x80c9, 0x8009);
sram_write(tp, 0x80d1, data);
sram_write(tp, 0x80a3, 0x200a);
sram_write(tp, 0x80a5, 0xf0ad);
sram_write(tp, 0x809f, 0x6073);
sram_write(tp, 0x80a1, 0x000b);
sram_write(tp, 0x80a9, data);
sram_write(tp, 0x817d, data);
sram_write(tp, 0x8044, 0x2417);
sram_write(tp, 0x804a, 0x2417);
sram_write(tp, 0x8050, 0x2417);
sram_write(tp, 0x8056, 0x2417);
sram_write(tp, 0x805c, 0x2417);
sram_write(tp, 0x8062, 0x2417);
sram_write(tp, 0x8068, 0x2417);
sram_write(tp, 0x806e, 0x2417);
sram_write(tp, 0x8074, 0x2417);
sram_write(tp, 0x807a, 0x2417);
response = sram_write(edge_serial->serial,